diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1445-drm-amd-powerplay-add-mclk_latency_table-struct-and-.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1445-drm-amd-powerplay-add-mclk_latency_table-struct-and-.patch | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1445-drm-amd-powerplay-add-mclk_latency_table-struct-and-.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1445-drm-amd-powerplay-add-mclk_latency_table-struct-and-.patch new file mode 100644 index 00000000..747422e8 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1445-drm-amd-powerplay-add-mclk_latency_table-struct-and-.patch @@ -0,0 +1,57 @@ +From a962e072f816a6676b77cc884407a6384eb49002 Mon Sep 17 00:00:00 2001 +From: Chengming Gui <Jack.Gui@amd.com> +Date: Thu, 17 Jan 2019 17:35:58 +0800 +Subject: [PATCH 1445/2940] drm/amd/powerplay: add mclk_latency_table struct + and smu_clocks struct for SMU11 + +add mclk_latency_table struct and smu_clocks structi +to support sys interface for SMU11. + +Signed-off-by: Chengming Gui <Jack.Gui@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 20 +++++++++++++++++++ + 1 file changed, 20 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +index 5ea8bee1de70..9d9e527bac3c 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +@@ -318,6 +318,7 @@ struct smu_dpm_context { + void *golden_dpm_context; + struct smu_power_state *dpm_request_power_state; + struct smu_power_state *dpm_current_power_state; ++ struct mclock_latency_table *mclk_latency_table; + }; + + struct smu_power_context { +@@ -335,6 +336,25 @@ struct smu_feature + DECLARE_BITMAP(enabled, SMU_FEATURE_MAX); + }; + ++struct smu_clocks { ++ uint32_t engine_clock; ++ uint32_t memory_clock; ++ uint32_t bus_bandwidth; ++ uint32_t engine_clock_in_sr; ++ uint32_t dcef_clock; ++ uint32_t dcef_clock_in_sr; ++}; ++ ++#define MAX_REGULAR_DPM_NUM 16 ++struct mclk_latency_entries { ++ uint32_t frequency; ++ uint32_t latency; ++}; ++struct mclock_latency_table { ++ uint32_t count; ++ struct mclk_latency_entries entries[MAX_REGULAR_DPM_NUM]; ++}; ++ + #define WORKLOAD_POLICY_MAX 7 + struct smu_context + { +-- +2.17.1 + |