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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1410-drm-amd-powerplay-upload-dpm-level-for-smu11.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.19.8/1410-drm-amd-powerplay-upload-dpm-level-for-smu11.patch101
1 files changed, 101 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1410-drm-amd-powerplay-upload-dpm-level-for-smu11.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1410-drm-amd-powerplay-upload-dpm-level-for-smu11.patch
new file mode 100644
index 00000000..55794997
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1410-drm-amd-powerplay-upload-dpm-level-for-smu11.patch
@@ -0,0 +1,101 @@
+From 5c9870c9f5775d97eb0bb5e7d1a50245daf0301a Mon Sep 17 00:00:00 2001
+From: Likun Gao <Likun.Gao@amd.com>
+Date: Mon, 7 Jan 2019 14:56:07 +0800
+Subject: [PATCH 1410/2940] drm/amd/powerplay: upload dpm level for smu11
+
+Add function to support gfx_clk and mem_clk upload min and max dpm level for smu11.
+
+Signed-off-by: Likun Gao <Likun.Gao@amd.com>
+Reviewed-by: Evan Quan <evan.quan@amd.com>
+Reviewed-by: Huang Rui <ray.huang@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 72 ++++++++++++++++++++++
+ 1 file changed, 72 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
+index 171cfc87989d..ff000afd246b 100644
+--- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
++++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c
+@@ -633,6 +633,78 @@ static int vega20_print_clk_levels(struct smu_context *smu,
+ return size;
+ }
+
++static int vega20_upload_dpm_min_level(struct smu_context *smu)
++{
++ struct vega20_dpm_table *dpm_table;
++ struct vega20_single_dpm_table *single_dpm_table;
++ uint32_t min_freq;
++ int ret = 0;
++
++ dpm_table = smu->smu_dpm.dpm_context;
++
++ if (smu_feature_is_enabled(smu, FEATURE_DPM_GFXCLK_BIT)) {
++ single_dpm_table = &(dpm_table->gfx_table);
++ min_freq = single_dpm_table->dpm_state.soft_min_level;
++ ret = smu_send_smc_msg_with_param(smu,
++ SMU_MSG_SetSoftMinByFreq,
++ (PPCLK_GFXCLK << 16) | (min_freq & 0xffff));
++ if (ret) {
++ pr_err("Failed to set soft min gfxclk !\n");
++ return ret;
++ }
++ }
++
++ if (smu_feature_is_enabled(smu, FEATURE_DPM_UCLK_BIT)) {
++ single_dpm_table = &(dpm_table->mem_table);
++ min_freq = single_dpm_table->dpm_state.soft_min_level;
++ ret = smu_send_smc_msg_with_param(smu,
++ SMU_MSG_SetSoftMinByFreq,
++ (PPCLK_UCLK << 16) | (min_freq & 0xffff));
++ if (ret) {
++ pr_err("Failed to set soft min memclk !\n");
++ return ret;
++ }
++ }
++
++ return ret;
++}
++
++static int vega20_upload_dpm_max_level(struct smu_context *smu)
++{
++ struct vega20_dpm_table *dpm_table;
++ struct vega20_single_dpm_table *single_dpm_table;
++ uint32_t max_freq;
++ int ret = 0;
++
++ dpm_table = smu->smu_dpm.dpm_context;
++
++ if (smu_feature_is_enabled(smu, FEATURE_DPM_GFXCLK_BIT)) {
++ single_dpm_table = &(dpm_table->gfx_table);
++ max_freq = single_dpm_table->dpm_state.soft_max_level;
++ ret = smu_send_smc_msg_with_param(smu,
++ SMU_MSG_SetSoftMaxByFreq,
++ (PPCLK_GFXCLK << 16) | (max_freq & 0xffff));
++ if (ret) {
++ pr_err("Failed to set soft max gfxclk !\n");
++ return ret;
++ }
++ }
++
++ if (smu_feature_is_enabled(smu, FEATURE_DPM_UCLK_BIT)) {
++ single_dpm_table = &(dpm_table->mem_table);
++ max_freq = single_dpm_table->dpm_state.soft_max_level;
++ ret = smu_send_smc_msg_with_param(smu,
++ SMU_MSG_SetSoftMaxByFreq,
++ (PPCLK_UCLK << 16) | (max_freq & 0xffff));
++ if (ret) {
++ pr_err("Failed to set soft max memclk !\n");
++ return ret;
++ }
++ }
++
++ return ret;
++}
++
+ static const struct pptable_funcs vega20_ppt_funcs = {
+ .alloc_dpm_context = vega20_allocate_dpm_context,
+ .store_powerplay_table = vega20_store_powerplay_table,
+--
+2.17.1
+