diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1402-drm-amd-powerplay-add-function-to-set-thermal-range.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1402-drm-amd-powerplay-add-function-to-set-thermal-range.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1402-drm-amd-powerplay-add-function-to-set-thermal-range.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1402-drm-amd-powerplay-add-function-to-set-thermal-range.patch new file mode 100644 index 00000000..7661791b --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1402-drm-amd-powerplay-add-function-to-set-thermal-range.patch @@ -0,0 +1,68 @@ +From fcf00770c9dc050701a5fbbfa3b66a002633b1d1 Mon Sep 17 00:00:00 2001 +From: Likun Gao <Likun.Gao@amd.com> +Date: Fri, 4 Jan 2019 14:13:09 +0800 +Subject: [PATCH 1402/2940] drm/amd/powerplay: add function to set thermal + range + +Add the function to set the correct min and max thermal value for smu11 + +Signed-off-by: Likun Gao <Likun.Gao@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +--- + drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 32 +++++++++++++++++++++++ + 1 file changed, 32 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +index 630ba22431a5..cf6b203032f6 100644 +--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c ++++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +@@ -42,6 +42,8 @@ + MODULE_FIRMWARE("amdgpu/vega20_smc.bin"); + + #define SMU11_TOOL_SIZE 0x19000 ++#define SMU11_THERMAL_MINIMUM_ALERT_TEMP 0 ++#define SMU11_THERMAL_MAXIMUM_ALERT_TEMP 255 + + static int smu_v11_0_send_msg_without_waiting(struct smu_context *smu, + uint16_t msg) +@@ -905,6 +907,36 @@ static int smu_v11_0_get_thermal_range(struct smu_context *smu, + return 0; + } + ++static int smu_v11_0_set_thermal_range(struct smu_context *smu, ++ struct PP_TemperatureRange *range) ++{ ++ struct amdgpu_device *adev = smu->adev; ++ int low = SMU11_THERMAL_MINIMUM_ALERT_TEMP * ++ PP_TEMPERATURE_UNITS_PER_CENTIGRADES; ++ int high = SMU11_THERMAL_MAXIMUM_ALERT_TEMP * ++ PP_TEMPERATURE_UNITS_PER_CENTIGRADES; ++ uint32_t val; ++ ++ if (low < range->min) ++ low = range->min; ++ if (high > range->max) ++ high = range->max; ++ ++ if (low > high) ++ return -EINVAL; ++ ++ val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL); ++ val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5); ++ val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1); ++ val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)); ++ val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)); ++ val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK); ++ ++ WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val); ++ ++ return 0; ++} ++ + static const struct smu_funcs smu_v11_0_funcs = { + .init_microcode = smu_v11_0_init_microcode, + .load_microcode = smu_v11_0_load_microcode, +-- +2.17.1 + |