diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1357-drm-amd-powerplay-add-pptable-header-for-smu11.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1357-drm-amd-powerplay-add-pptable-header-for-smu11.patch | 184 |
1 files changed, 184 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1357-drm-amd-powerplay-add-pptable-header-for-smu11.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1357-drm-amd-powerplay-add-pptable-header-for-smu11.patch new file mode 100644 index 00000000..5d59ad3b --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1357-drm-amd-powerplay-add-pptable-header-for-smu11.patch @@ -0,0 +1,184 @@ +From 094e8eb5dbe0b267ce9474d718d6e9528c9b303c Mon Sep 17 00:00:00 2001 +From: Huang Rui <ray.huang@amd.com> +Date: Wed, 12 Dec 2018 19:55:30 +0800 +Subject: [PATCH 1357/2940] drm/amd/powerplay: add pptable header for smu11 + +This patch adds the pptable header for smu11. + +Signed-off-by: Huang Rui <ray.huang@amd.com> +Reviewed-by: Kevin Wang <Kevin1.Wang@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../drm/amd/powerplay/inc/smu_v11_0_pptable.h | 147 ++++++++++++++++++ + drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 1 + + 2 files changed, 148 insertions(+) + create mode 100644 drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h + +diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h +new file mode 100644 +index 000000000000..45aed6f2dbc2 +--- /dev/null ++++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h +@@ -0,0 +1,147 @@ ++/* ++ * Copyright 2018 Advanced Micro Devices, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR ++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ * ++ */ ++#ifndef SMU_11_0_PPTABLE_H ++#define SMU_11_0_PPTABLE_H ++ ++ ++#define SMU_11_0_TABLE_FORMAT_REVISION 12 ++ ++//// POWERPLAYTABLE::ulPlatformCaps ++#define SMU_11_0_PP_PLATFORM_CAP_POWERPLAY 0x1 ++#define SMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 0x2 ++#define SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC 0x4 ++#define SMU_11_0_PP_PLATFORM_CAP_BACO 0x8 ++#define SMU_11_0_PP_PLATFORM_CAP_MACO 0x10 ++#define SMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE 0x20 ++ ++// SMU_11_0_PP_THERMALCONTROLLER - Thermal Controller Type ++#define SMU_11_0_PP_THERMALCONTROLLER_NONE 0 ++ ++#define SMU_11_0_PP_OVERDRIVE_VERSION 0x0800 ++#define SMU_11_0_PP_POWERSAVINGCLOCK_VERSION 0x0100 ++ ++enum SMU_11_0_ODFEATURE_ID { ++ SMU_11_0_ODFEATURE_GFXCLK_LIMITS = 0, //GFXCLK Limit feature ++ SMU_11_0_ODFEATURE_GFXCLK_CURVE, //GFXCLK Curve feature ++ SMU_11_0_ODFEATURE_UCLK_MAX, //UCLK Limit feature ++ SMU_11_0_ODFEATURE_POWER_LIMIT, //Power Limit feature ++ SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT, //Fan Acoustic RPM feature ++ SMU_11_0_ODFEATURE_FAN_SPEED_MIN, //Minimum Fan Speed feature ++ SMU_11_0_ODFEATURE_TEMPERATURE_FAN, //Fan Target Temperature Limit feature ++ SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM, //Operating Temperature Limit feature ++ SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE, //AC Timing Tuning feature ++ SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL, //Zero RPM feature ++ SMU_11_0_ODFEATURE_AUTO_UV_ENGINE, //Auto Under Volt GFXCLK feature ++ SMU_11_0_ODFEATURE_AUTO_OC_ENGINE, //Auto Over Clock GFXCLK feature ++ SMU_11_0_ODFEATURE_AUTO_OC_MEMORY, //Auto Over Clock MCLK feature ++ SMU_11_0_ODFEATURE_COUNT, ++}; ++#define SMU_11_0_MAX_ODFEATURE 32 //Maximum Number of OD Features ++ ++enum SMU_11_0_ODSETTING_ID { ++ SMU_11_0_ODSETTING_GFXCLKFMAX = 0, ++ SMU_11_0_ODSETTING_GFXCLKFMIN, ++ SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1, ++ SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1, ++ SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2, ++ SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2, ++ SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3, ++ SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3, ++ SMU_11_0_ODSETTING_UCLKFMAX, ++ SMU_11_0_ODSETTING_POWERPERCENTAGE, ++ SMU_11_0_ODSETTING_FANRPMMIN, ++ SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT, ++ SMU_11_0_ODSETTING_FANTARGETTEMPERATURE, ++ SMU_11_0_ODSETTING_OPERATINGTEMPMAX, ++ SMU_11_0_ODSETTING_ACTIMING, ++ SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL, ++ SMU_11_0_ODSETTING_AUTOUVENGINE, ++ SMU_11_0_ODSETTING_AUTOOCENGINE, ++ SMU_11_0_ODSETTING_AUTOOCMEMORY, ++ SMU_11_0_ODSETTING_COUNT, ++}; ++#define SMU_11_0_MAX_ODSETTING 32 //Maximum Number of ODSettings ++ ++struct smu_11_0_overdrive_table ++{ ++ uint8_t revision; //Revision = SMU_11_0_PP_OVERDRIVE_VERSION ++ uint8_t reserve[3]; //Zero filled field reserved for future use ++ uint32_t feature_count; //Total number of supported features ++ uint32_t setting_count; //Total number of supported settings ++ uint8_t cap[SMU_11_0_MAX_ODFEATURE]; //OD feature support flags ++ uint32_t max[SMU_11_0_MAX_ODSETTING]; //default maximum settings ++ uint32_t min[SMU_11_0_MAX_ODSETTING]; //default minimum settings ++}; ++ ++enum SMU_11_0_PPCLOCK_ID { ++ SMU_11_0_PPCLOCK_GFXCLK = 0, ++ SMU_11_0_PPCLOCK_VCLK, ++ SMU_11_0_PPCLOCK_DCLK, ++ SMU_11_0_PPCLOCK_ECLK, ++ SMU_11_0_PPCLOCK_SOCCLK, ++ SMU_11_0_PPCLOCK_UCLK, ++ SMU_11_0_PPCLOCK_DCEFCLK, ++ SMU_11_0_PPCLOCK_DISPCLK, ++ SMU_11_0_PPCLOCK_PIXCLK, ++ SMU_11_0_PPCLOCK_PHYCLK, ++ SMU_11_0_PPCLOCK_COUNT, ++}; ++#define SMU_11_0_MAX_PPCLOCK 16 //Maximum Number of PP Clocks ++ ++struct smu_11_0_power_saving_clock_table ++{ ++ uint8_t revision; //Revision = SMU_11_0_PP_POWERSAVINGCLOCK_VERSION ++ uint8_t reserve[3]; //Zero filled field reserved for future use ++ uint32_t count; //power_saving_clock_count = SMU_11_0_PPCLOCK_COUNT ++ uint32_t max[SMU_11_0_MAX_PPCLOCK]; //PowerSavingClock Mode Clock Maximum array In MHz ++ uint32_t min[SMU_11_0_MAX_PPCLOCK]; //PowerSavingClock Mode Clock Minimum array In MHz ++}; ++ ++struct smu_11_0_powerplay_table ++{ ++ struct atom_common_table_header header; ++ uint8_t table_revision; ++ uint32_t table_size; //Driver portion table size. The offset to smc_pptable including header size ++ uint32_t golden_pp_id; ++ uint32_t golden_revision; ++ uint16_t format_id; ++ uint32_t platform_caps; //POWERPLAYABLE::ulPlatformCaps ++ ++ uint8_t thermal_controller_type; //one of SMU_11_0_PP_THERMALCONTROLLER ++ ++ uint16_t small_power_limit1; ++ uint16_t small_power_limit2; ++ uint16_t boost_power_limit; ++ uint16_t od_turbo_power_limit; //Power limit setting for Turbo mode in Performance UI Tuning. ++ uint16_t od_power_save_power_limit; //Power limit setting for PowerSave/Optimal mode in Performance UI Tuning. ++ uint16_t software_shutdown_temp; ++ ++ uint16_t reserve[6]; //Zero filled field reserved for future use ++ ++ struct smu_11_0_power_saving_clock_table power_saving_clock; ++ struct smu_11_0_overdrive_table overdrive_table; ++ ++ PPTable_t smc_pptable; //PPTable_t in smu11_driver_if.h ++}; ++ ++#endif +diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +index 58091442f8d3..84ce624a8179 100644 +--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c ++++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +@@ -28,6 +28,7 @@ + #include "smu_v11_0_ppsmc.h" + #include "smu11_driver_if.h" + #include "soc15_common.h" ++#include "smu_v11_0_pptable.h" + + #include "asic_reg/thm/thm_11_0_2_offset.h" + #include "asic_reg/thm/thm_11_0_2_sh_mask.h" +-- +2.17.1 + |