diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1324-drm-amd-powerplay-overwrite-ODSettingsMin-for-UCLK_F.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1324-drm-amd-powerplay-overwrite-ODSettingsMin-for-UCLK_F.patch | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1324-drm-amd-powerplay-overwrite-ODSettingsMin-for-UCLK_F.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1324-drm-amd-powerplay-overwrite-ODSettingsMin-for-UCLK_F.patch new file mode 100644 index 00000000..6ba4a764 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1324-drm-amd-powerplay-overwrite-ODSettingsMin-for-UCLK_F.patch @@ -0,0 +1,82 @@ +From 3819e8844d83b181f99af758ebaba2974fef2ebc Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Wed, 20 Feb 2019 16:40:47 +0800 +Subject: [PATCH 1324/2940] drm/amd/powerplay: overwrite ODSettingsMin for + UCLK_FMAX feature + +For UCLK_FMAX OD feature, SMU overwrites the highest UCLK DPM level freq. +Therefore it can only take values that are greater than the second highest +DPM level freq. + +Change-Id: I81eec21d8212ee08425c6462376b82690f4f8038 +Signed-off-by: Evan Quan <evan.quan@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 19 +++++-------------- + 1 file changed, 5 insertions(+), 14 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c +index 17ea5c699240..ea79417958ec 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c +@@ -979,6 +979,8 @@ static int vega20_od8_set_feature_capabilities( + } + + if (data->smu_features[GNLD_DPM_UCLK].enabled) { ++ pptable_information->od_settings_min[OD8_SETTING_UCLK_FMAX] = ++ data->dpm_table.mem_table.dpm_levels[data->dpm_table.mem_table.count - 2].value; + if (pptable_information->od_feature_capabilities[ATOM_VEGA20_ODFEATURE_UCLK_MAX] && + pptable_information->od_settings_min[OD8_SETTING_UCLK_FMAX] > 0 && + pptable_information->od_settings_max[OD8_SETTING_UCLK_FMAX] > 0 && +@@ -2771,7 +2773,6 @@ static int vega20_odn_edit_dpm_table(struct pp_hwmgr *hwmgr, + data->od8_settings.od8_settings_array; + OverDriveTable_t *od_table = + &(data->smc_state_table.overdrive_table); +- struct pp_clock_levels_with_latency clocks; + int32_t input_index, input_clk, input_vol, i; + int od8_id; + int ret; +@@ -2830,11 +2831,6 @@ static int vega20_odn_edit_dpm_table(struct pp_hwmgr *hwmgr, + return -EOPNOTSUPP; + } + +- ret = vega20_get_memclocks(hwmgr, &clocks); +- PP_ASSERT_WITH_CODE(!ret, +- "Attempt to get memory clk levels failed!", +- return ret); +- + for (i = 0; i < size; i += 2) { + if (i + 2 > size) { + pr_info("invalid number of input parameters %d\n", +@@ -2851,11 +2847,11 @@ static int vega20_odn_edit_dpm_table(struct pp_hwmgr *hwmgr, + return -EINVAL; + } + +- if (input_clk < clocks.data[0].clocks_in_khz / 1000 || ++ if (input_clk < od8_settings[OD8_SETTING_UCLK_FMAX].min_value || + input_clk > od8_settings[OD8_SETTING_UCLK_FMAX].max_value) { + pr_info("clock freq %d is not within allowed range [%d - %d]\n", + input_clk, +- clocks.data[0].clocks_in_khz / 1000, ++ od8_settings[OD8_SETTING_UCLK_FMAX].min_value, + od8_settings[OD8_SETTING_UCLK_FMAX].max_value); + return -EINVAL; + } +@@ -3264,13 +3260,8 @@ static int vega20_print_clock_levels(struct pp_hwmgr *hwmgr, + } + + if (od8_settings[OD8_SETTING_UCLK_FMAX].feature_id) { +- ret = vega20_get_memclocks(hwmgr, &clocks); +- PP_ASSERT_WITH_CODE(!ret, +- "Fail to get memory clk levels!", +- return ret); +- + size += sprintf(buf + size, "MCLK: %7uMhz %10uMhz\n", +- clocks.data[0].clocks_in_khz / 1000, ++ od8_settings[OD8_SETTING_UCLK_FMAX].min_value, + od8_settings[OD8_SETTING_UCLK_FMAX].max_value); + } + +-- +2.17.1 + |