diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1294-drm-amd-display-Remove-redundant-else-statement-in-d.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1294-drm-amd-display-Remove-redundant-else-statement-in-d.patch | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1294-drm-amd-display-Remove-redundant-else-statement-in-d.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1294-drm-amd-display-Remove-redundant-else-statement-in-d.patch new file mode 100644 index 00000000..b08c26ed --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1294-drm-amd-display-Remove-redundant-else-statement-in-d.patch @@ -0,0 +1,47 @@ +From 9619644aa32e809bce2b49e1c5be526f3bb5601e Mon Sep 17 00:00:00 2001 +From: Fatemeh Darbehani <fatemeh.darbehani@amd.com> +Date: Thu, 20 Dec 2018 16:54:07 -0500 +Subject: [PATCH 1294/2940] drm/amd/display: Remove redundant 'else' statement + in dcn1_update_clocks + +[Why] +DM has impelemented new pp_smu interface. 'Else' is not longer needed. + +Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com> +Reviewed-by: Eric Yang <eric.yang2@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +Acked-by: Yongqiang Sun <yongqiang.sun@amd.com> +Signed-off-by: Chaudhary Amit Kumar <Chaudharyamit.Kumar@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c | 8 -------- + 1 file changed, 8 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c +index 1f3eaa20a0de..f8a912fb3680 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c +@@ -246,10 +246,6 @@ static void dcn1_update_clocks(struct clk_mgr *clk_mgr, + pp_smu->set_hard_min_fclk_by_freq(&pp_smu->pp_smu, smu_req.hard_min_fclk_mhz); + pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, smu_req.hard_min_dcefclk_mhz); + pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, smu_req.min_deep_sleep_dcefclk_mhz); +- } else { +- if (pp_smu->set_display_requirement) +- pp_smu->set_display_requirement(&pp_smu->pp_smu, &smu_req); +- dcn1_pplib_apply_display_requirements(dc, context); + } + } + +@@ -272,10 +268,6 @@ static void dcn1_update_clocks(struct clk_mgr *clk_mgr, + pp_smu->set_hard_min_fclk_by_freq(&pp_smu->pp_smu, smu_req.hard_min_fclk_mhz); + pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, smu_req.hard_min_dcefclk_mhz); + pp_smu->set_min_deep_sleep_dcfclk(&pp_smu->pp_smu, smu_req.min_deep_sleep_dcefclk_mhz); +- } else { +- if (pp_smu->set_display_requirement) +- pp_smu->set_display_requirement(&pp_smu->pp_smu, &smu_req); +- dcn1_pplib_apply_display_requirements(dc, context); + } + + } +-- +2.17.1 + |