diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1259-drm-amd-display-send-pipe-set-command-to-dmcu-when-s.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1259-drm-amd-display-send-pipe-set-command-to-dmcu-when-s.patch | 131 |
1 files changed, 131 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1259-drm-amd-display-send-pipe-set-command-to-dmcu-when-s.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1259-drm-amd-display-send-pipe-set-command-to-dmcu-when-s.patch new file mode 100644 index 00000000..1f2c862b --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1259-drm-amd-display-send-pipe-set-command-to-dmcu-when-s.patch @@ -0,0 +1,131 @@ +From f0f023fd42dbb64f470eb4d7c986deca2662aad7 Mon Sep 17 00:00:00 2001 +From: Josip Pavic <Josip.Pavic@amd.com> +Date: Tue, 29 Jan 2019 14:15:03 -0500 +Subject: [PATCH 1259/2940] drm/amd/display: send pipe set command to dmcu when + stream unblanks + +[Why] +When stream is blanked, pipe set command is sent to dmcu to notify it +that the abm pipe is disabled. When stream is unblanked, no notification is +made to dmcu that the abm pipe has been enabled, resulting in abm not +being enabled in the firmware. + +[How] +When stream is unblanked, send a pipe set command to dmcu. + +Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> +Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dce/dce_abm.c | 32 ++++++++++--------- + .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 4 ++- + drivers/gpu/drm/amd/display/dc/inc/hw/abm.h | 1 + + 3 files changed, 21 insertions(+), 16 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c +index 01e56f1a9f34..a740bc3418a1 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c ++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c +@@ -175,7 +175,6 @@ static void dmcu_set_backlight_level( + uint32_t controller_id) + { + unsigned int backlight_8_bit = 0; +- uint32_t rampingBoundary = 0xFFFF; + uint32_t s2; + + if (backlight_pwm_u16_16 & 0x10000) +@@ -185,17 +184,6 @@ static void dmcu_set_backlight_level( + // Take MSB of fractional part since backlight is not max + backlight_8_bit = (backlight_pwm_u16_16 >> 8) & 0xFF; + +- /* set ramping boundary */ +- REG_WRITE(MASTER_COMM_DATA_REG1, rampingBoundary); +- +- /* setDMCUParam_Pipe */ +- REG_UPDATE_2(MASTER_COMM_CMD_REG, +- MASTER_COMM_CMD_REG_BYTE0, MCP_ABM_PIPE_SET, +- MASTER_COMM_CMD_REG_BYTE1, controller_id); +- +- /* notifyDMCUMsg */ +- REG_UPDATE(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 1); +- + /* waitDMCUReadyForCmd */ + REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, + 0, 1, 80000); +@@ -305,21 +293,34 @@ static bool dce_abm_set_level(struct abm *abm, uint32_t level) + return true; + } + +-static bool dce_abm_immediate_disable(struct abm *abm) ++static bool dce_abm_set_pipe(struct abm *abm, uint32_t controller_id) + { + struct dce_abm *abm_dce = TO_DCE_ABM(abm); ++ uint32_t rampingBoundary = 0xFFFF; + + REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, + 1, 80000); + +- /* setDMCUParam_ABMLevel */ ++ /* set ramping boundary */ ++ REG_WRITE(MASTER_COMM_DATA_REG1, rampingBoundary); ++ ++ /* setDMCUParam_Pipe */ + REG_UPDATE_2(MASTER_COMM_CMD_REG, + MASTER_COMM_CMD_REG_BYTE0, MCP_ABM_PIPE_SET, +- MASTER_COMM_CMD_REG_BYTE1, MCP_DISABLE_ABM_IMMEDIATELY); ++ MASTER_COMM_CMD_REG_BYTE1, controller_id); + + /* notifyDMCUMsg */ + REG_UPDATE(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 1); + ++ return true; ++} ++ ++static bool dce_abm_immediate_disable(struct abm *abm) ++{ ++ struct dce_abm *abm_dce = TO_DCE_ABM(abm); ++ ++ dce_abm_set_pipe(abm, MCP_DISABLE_ABM_IMMEDIATELY); ++ + abm->stored_backlight_registers.BL_PWM_CNTL = + REG_READ(BL_PWM_CNTL); + abm->stored_backlight_registers.BL_PWM_CNTL2 = +@@ -419,6 +420,7 @@ static const struct abm_funcs dce_funcs = { + .abm_init = dce_abm_init, + .set_abm_level = dce_abm_set_level, + .init_backlight = dce_abm_init_backlight, ++ .set_pipe = dce_abm_set_pipe, + .set_backlight_level_pwm = dce_abm_set_backlight_level_pwm, + .get_current_backlight = dce_abm_get_current_backlight, + .get_target_backlight = dce_abm_get_target_backlight, +diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +index ac021b2877ab..f508c4de0213 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +@@ -2161,8 +2161,10 @@ static void dcn10_blank_pixel_data( + if (!blank) { + if (stream_res->tg->funcs->set_blank) + stream_res->tg->funcs->set_blank(stream_res->tg, blank); +- if (stream_res->abm) ++ if (stream_res->abm) { ++ stream_res->abm->funcs->set_pipe(stream_res->abm, stream_res->tg->inst + 1); + stream_res->abm->funcs->set_abm_level(stream_res->abm, stream->abm_level); ++ } + } else if (blank) { + if (stream_res->abm) + stream_res->abm->funcs->set_abm_immediate_disable(stream_res->abm); +diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/abm.h b/drivers/gpu/drm/amd/display/dc/inc/hw/abm.h +index abc961c0906e..86dc39a02408 100644 +--- a/drivers/gpu/drm/amd/display/dc/inc/hw/abm.h ++++ b/drivers/gpu/drm/amd/display/dc/inc/hw/abm.h +@@ -46,6 +46,7 @@ struct abm_funcs { + void (*abm_init)(struct abm *abm); + bool (*set_abm_level)(struct abm *abm, unsigned int abm_level); + bool (*set_abm_immediate_disable)(struct abm *abm); ++ bool (*set_pipe)(struct abm *abm, unsigned int controller_id); + bool (*init_backlight)(struct abm *abm); + + /* backlight_pwm_u16_16 is unsigned 32 bit, +-- +2.17.1 + |