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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1207-drm-amd-display-determine-if-a-pipe-is-synced-by-pla.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.19.8/1207-drm-amd-display-determine-if-a-pipe-is-synced-by-pla.patch56
1 files changed, 56 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1207-drm-amd-display-determine-if-a-pipe-is-synced-by-pla.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1207-drm-amd-display-determine-if-a-pipe-is-synced-by-pla.patch
new file mode 100644
index 00000000..52e1ae06
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1207-drm-amd-display-determine-if-a-pipe-is-synced-by-pla.patch
@@ -0,0 +1,56 @@
+From a4761e37aceaf31f4f6f065e114b397a23923f4f Mon Sep 17 00:00:00 2001
+From: Wenjing Liu <Wenjing.Liu@amd.com>
+Date: Fri, 18 Jan 2019 18:19:51 -0500
+Subject: [PATCH 1207/2940] drm/amd/display: determine if a pipe is synced by
+ plane state
+
+[why]
+is_blanked is not a general indicator of if a pipe is synced
+for all asics.
+plane state is more accurate and applicable for all asics.
+
+[how]
+Remove is_blanked call and
+add checking plane_state against NULL instead.
+
+Change-Id: Ieaef81b60a5fa6ad694f45ff44f9cadc7057f259
+Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
+Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
+Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/core/dc.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
+index 7ba22006da91..475e270895d7 100644
+--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
++++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
+@@ -907,11 +907,11 @@ static void program_timing_sync(
+ }
+ }
+
+- /* set first unblanked pipe as master */
++ /* set first pipe with plane as master */
+ for (j = 0; j < group_size; j++) {
+ struct pipe_ctx *temp;
+
+- if (pipe_set[j]->stream_res.tg->funcs->is_blanked && !pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg)) {
++ if (pipe_set[j]->plane_state) {
+ if (j == 0)
+ break;
+
+@@ -922,9 +922,9 @@ static void program_timing_sync(
+ }
+ }
+
+- /* remove any other unblanked pipes as they have already been synced */
++ /* remove any other pipes with plane as they have already been synced */
+ for (j = j + 1; j < group_size; j++) {
+- if (pipe_set[j]->stream_res.tg->funcs->is_blanked && !pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg)) {
++ if (pipe_set[j]->plane_state) {
+ group_size--;
+ pipe_set[j] = pipe_set[group_size];
+ j--;
+--
+2.17.1
+