diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1168-drm-amd-powerplay-add-override-pcie-parameters-for-V.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1168-drm-amd-powerplay-add-override-pcie-parameters-for-V.patch | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1168-drm-amd-powerplay-add-override-pcie-parameters-for-V.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1168-drm-amd-powerplay-add-override-pcie-parameters-for-V.patch new file mode 100644 index 00000000..bf91160c --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1168-drm-amd-powerplay-add-override-pcie-parameters-for-V.patch @@ -0,0 +1,82 @@ +From c3275e7becf1c75eaf8da2b551237079aa6eb144 Mon Sep 17 00:00:00 2001 +From: Eric Huang <JinhuiEric.Huang@amd.com> +Date: Fri, 25 Jan 2019 16:29:25 -0500 +Subject: [PATCH 1168/2940] drm/amd/powerplay: add override pcie parameters for + Vega20 + +It is to solve RDMA performance issue. + +Change-Id: I441d2943e504e2ef7d33de0e8773a0f9b8fdb2ca +Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 46 +++++++++++++++++++ + 1 file changed, 46 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c +index 7b49a9a13a4a..da022ca79b56 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c +@@ -771,6 +771,47 @@ static int vega20_init_smc_table(struct pp_hwmgr *hwmgr) + return 0; + } + ++static int vega20_override_pcie_parameters(struct pp_hwmgr *hwmgr) ++{ ++ struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev); ++ uint32_t pcie_speed = 0, pcie_width = 0, pcie_arg; ++ int ret; ++ ++ if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4) ++ pcie_speed = 16; ++ else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3) ++ pcie_speed = 8; ++ else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2) ++ pcie_speed = 5; ++ else if (adev->pm.pcie_gen_mask & CAIL_PCIE_LINK_SPEED_SUPPORT_GEN1) ++ pcie_speed = 2; ++ ++ if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X32) ++ pcie_width = 32; ++ else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X16) ++ pcie_width = 16; ++ else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X12) ++ pcie_width = 12; ++ else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) ++ pcie_width = 8; ++ else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X4) ++ pcie_width = 4; ++ else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X2) ++ pcie_width = 2; ++ else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X1) ++ pcie_width = 1; ++ ++ pcie_arg = pcie_width | (pcie_speed << 8); ++ ++ ret = smum_send_msg_to_smc_with_parameter(hwmgr, ++ PPSMC_MSG_OverridePcieParameters, pcie_arg); ++ PP_ASSERT_WITH_CODE(!ret, ++ "[OverridePcieParameters] Attempt to override pcie params failed!", ++ return ret); ++ ++ return 0; ++} ++ + static int vega20_set_allowed_featuresmask(struct pp_hwmgr *hwmgr) + { + struct vega20_hwmgr *data = +@@ -1570,6 +1611,11 @@ static int vega20_enable_dpm_tasks(struct pp_hwmgr *hwmgr) + "[EnableDPMTasks] Failed to initialize SMC table!", + return result); + ++ result = vega20_override_pcie_parameters(hwmgr); ++ PP_ASSERT_WITH_CODE(!result, ++ "[EnableDPMTasks] Failed to override pcie parameters!", ++ return result); ++ + result = vega20_run_btc(hwmgr); + PP_ASSERT_WITH_CODE(!result, + "[EnableDPMTasks] Failed to run btc!", +-- +2.17.1 + |