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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1105-drm-amdgpu-Setting-doorbell-range-registers-earlier.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.19.8/1105-drm-amdgpu-Setting-doorbell-range-registers-earlier.patch92
1 files changed, 92 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1105-drm-amdgpu-Setting-doorbell-range-registers-earlier.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1105-drm-amdgpu-Setting-doorbell-range-registers-earlier.patch
new file mode 100644
index 00000000..db718223
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1105-drm-amdgpu-Setting-doorbell-range-registers-earlier.patch
@@ -0,0 +1,92 @@
+From c24d38e4fa2c5ce7a38798676a31e89c1ceb9a58 Mon Sep 17 00:00:00 2001
+From: Oak Zeng <Oak.Zeng@amd.com>
+Date: Mon, 14 Jan 2019 16:32:53 -0600
+Subject: [PATCH 1105/2940] drm/amdgpu: Setting doorbell range registers
+ earlier
+
+HW doorbell writing routing policy: writing to doorbell
+not in SDMA/IH/MM/ACV doorbell range will be routed to CP.
+So CP doorbell routing depends on doorbell range setting
+of above blocks. Setting doorbell range of above blocks
+earlier (soc15_common_hw_init) to make sure CP doorbell
+writing be routed to CP block.
+
+Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 ---
+ drivers/gpu/drm/amd/amdgpu/soc15.c | 22 ++++++++++++++++++++++
+ drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 2 --
+ 3 files changed, 22 insertions(+), 5 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+index 8de387820b81..3fb76f30c7fe 100644
+--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+@@ -834,9 +834,6 @@ static void sdma_v4_0_gfx_resume(struct amdgpu_device *adev, unsigned int i)
+ OFFSET, ring->doorbell_index);
+ WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL, doorbell);
+ WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL_OFFSET, doorbell_offset);
+- adev->nbio_funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,
+- ring->doorbell_index,
+- adev->doorbell_index.sdma_doorbell_range);
+
+ sdma_v4_0_ring_set_wptr(ring);
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
+index 1cf4a89f4157..4b4dcadc2a5d 100644
+--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
+@@ -965,6 +965,22 @@ static int soc15_common_sw_fini(void *handle)
+ return 0;
+ }
+
++static void soc15_doorbell_range_init(struct amdgpu_device *adev)
++{
++ int i;
++ struct amdgpu_ring *ring;
++
++ for (i = 0; i < adev->sdma.num_instances; i++) {
++ ring = &adev->sdma.instance[i].ring;
++ adev->nbio_funcs->sdma_doorbell_range(adev, i,
++ ring->use_doorbell, ring->doorbell_index,
++ adev->doorbell_index.sdma_doorbell_range);
++ }
++
++ adev->nbio_funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell,
++ adev->irq.ih.doorbell_index);
++}
++
+ static int soc15_common_hw_init(void *handle)
+ {
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+@@ -977,6 +993,12 @@ static int soc15_common_hw_init(void *handle)
+ adev->nbio_funcs->init_registers(adev);
+ /* enable the doorbell aperture */
+ soc15_enable_doorbell_aperture(adev, true);
++ /* HW doorbell routing policy: doorbell writing not
++ * in SDMA/IH/MM/ACV range will be routed to CP. So
++ * we need to init SDMA/IH/MM/ACV doorbell range prior
++ * to CP ip block init and ring test.
++ */
++ soc15_doorbell_range_init(adev);
+
+ return 0;
+ }
+diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+index 562701939d3e..877b4a6d21f7 100644
+--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
++++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+@@ -140,8 +140,6 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
+ ENABLE, 0);
+ }
+ WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR, ih_doorbell_rtpr);
+- adev->nbio_funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell,
+- adev->irq.ih.doorbell_index);
+
+ tmp = RREG32_SOC15(OSSSYS, 0, mmIH_STORM_CLIENT_LIST_CNTL);
+ tmp = REG_SET_FIELD(tmp, IH_STORM_CLIENT_LIST_CNTL,
+--
+2.17.1
+