diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/1057-drm-amdgpu-vi-add-need_reset_on_init-asic-callback-f.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/1057-drm-amdgpu-vi-add-need_reset_on_init-asic-callback-f.patch | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/1057-drm-amdgpu-vi-add-need_reset_on_init-asic-callback-f.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/1057-drm-amdgpu-vi-add-need_reset_on_init-asic-callback-f.patch new file mode 100644 index 00000000..3991f144 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/1057-drm-amdgpu-vi-add-need_reset_on_init-asic-callback-f.patch @@ -0,0 +1,57 @@ +From 5d6277d54ba29d7b53519494bf193f40681966f1 Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Thu, 1 Nov 2018 00:00:09 -0500 +Subject: [PATCH 1057/2940] drm/amdgpu/vi: add need_reset_on_init asic callback + for VI (v2) + +VI chips require a reset if the driver was previously loaded +because the SMU can only be loaded once between each reset. + +v2: rebase + +Reviewed-by: Evan Quan <evan.quan@amd.com> +Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/vi.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c +index a542e20bf846..29422c2dc566 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vi.c ++++ b/drivers/gpu/drm/amd/amdgpu/vi.c +@@ -987,6 +987,23 @@ static void vi_get_pcie_usage(struct amdgpu_device *adev, uint64_t *count0, + *count1 = RREG32_PCIE(ixPCIE_PERF_COUNT1_TXCLK) | (cnt1_of << 32); + } + ++static bool vi_need_reset_on_init(struct amdgpu_device *adev) ++{ ++ u32 clock_cntl, pc; ++ ++ if (adev->flags & AMD_IS_APU) ++ return false; ++ ++ /* check if the SMC is already running */ ++ clock_cntl = RREG32_SMC(ixSMC_SYSCON_CLOCK_CNTL_0); ++ pc = RREG32_SMC(ixSMC_PC_C); ++ if ((0 == REG_GET_FIELD(clock_cntl, SMC_SYSCON_CLOCK_CNTL_0, ck_disable)) && ++ (0x20100 <= pc)) ++ return true; ++ ++ return false; ++} ++ + static const struct amdgpu_asic_funcs vi_asic_funcs = + { + .read_disabled_bios = &vi_read_disabled_bios, +@@ -1003,6 +1020,7 @@ static const struct amdgpu_asic_funcs vi_asic_funcs = + .need_full_reset = &vi_need_full_reset, + .init_doorbell_index = &legacy_doorbell_index_init, + .get_pcie_usage = &vi_get_pcie_usage, ++ .need_reset_on_init = &vi_need_reset_on_init, + }; + + #define CZ_REV_BRISTOL(rev) \ +-- +2.17.1 + |