diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0950-drm-amdgpu-vcn-Remove-bit-31-for-scratch2-to-indicat.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/0950-drm-amdgpu-vcn-Remove-bit-31-for-scratch2-to-indicat.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0950-drm-amdgpu-vcn-Remove-bit-31-for-scratch2-to-indicat.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0950-drm-amdgpu-vcn-Remove-bit-31-for-scratch2-to-indicat.patch new file mode 100644 index 00000000..90fee631 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0950-drm-amdgpu-vcn-Remove-bit-31-for-scratch2-to-indicat.patch @@ -0,0 +1,40 @@ +From 81396406741bceef3ed74a5ba3707b1783afaeb1 Mon Sep 17 00:00:00 2001 +From: James Zhu <James.Zhu@amd.com> +Date: Wed, 12 Dec 2018 14:57:12 -0500 +Subject: [PATCH 0950/2940] drm/amdgpu/vcn:Remove bit 31 for scratch2 to + indicate the WA is active + +Remove bit 31 for scratch2 to indicate the Hardware bug work around is active. + +Signed-off-by: James Zhu <James.Zhu@amd.com> +Acked-by: Leo Liu <leo.liu@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c +index dde7bcdede4f..ecf6f96df2ad 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c +@@ -262,7 +262,7 @@ static int amdgpu_vcn_pause_dpg_mode(struct amdgpu_device *adev, + + ring = &adev->vcn.ring_dec; + WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, +- RREG32_SOC15(UVD, 0, mmUVD_SCRATCH2)); ++ RREG32_SOC15(UVD, 0, mmUVD_SCRATCH2) & 0x7FFFFFFF); + SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, + UVD_PGFSM_CONFIG__UVDM_UVDU_PWR_ON, + UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, ret_code); +@@ -322,7 +322,7 @@ static int amdgpu_vcn_pause_dpg_mode(struct amdgpu_device *adev, + + ring = &adev->vcn.ring_dec; + WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, +- RREG32_SOC15(UVD, 0, mmUVD_SCRATCH2)); ++ RREG32_SOC15(UVD, 0, mmUVD_SCRATCH2) & 0x7FFFFFFF); + SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, + UVD_PGFSM_CONFIG__UVDM_UVDU_PWR_ON, + UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, ret_code); +-- +2.17.1 + |