diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0907-drm-amd-include-Add-mmhub-9.4-reg-offsets-and-shift-.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/0907-drm-amd-include-Add-mmhub-9.4-reg-offsets-and-shift-.patch | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0907-drm-amd-include-Add-mmhub-9.4-reg-offsets-and-shift-.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0907-drm-amd-include-Add-mmhub-9.4-reg-offsets-and-shift-.patch new file mode 100644 index 00000000..67129a2e --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0907-drm-amd-include-Add-mmhub-9.4-reg-offsets-and-shift-.patch @@ -0,0 +1,103 @@ +From edff818973ce170bd247f77882179cd7dcb72449 Mon Sep 17 00:00:00 2001 +From: Leo Li <sunpeng.li@amd.com> +Date: Thu, 22 Nov 2018 09:39:17 -0500 +Subject: [PATCH 0907/2940] drm/amd/include: Add mmhub 9.4 reg offsets and + shift-mask + +In particular, we need the mmMC_VM_XGMI_LFB_CNTL register, for +determining if xGMI is enabled on VG20. This will be used by DC to +determine the correct spread spectrum adjustment for display and audio +clocks. + +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Leo Li <sunpeng.li@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../asic_reg/mmhub/mmhub_9_4_0_offset.h | 32 +++++++++++++++++ + .../asic_reg/mmhub/mmhub_9_4_0_sh_mask.h | 35 +++++++++++++++++++ + 2 files changed, 67 insertions(+) + create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_0_offset.h + create mode 100644 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_0_sh_mask.h + +diff --git a/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_0_offset.h +new file mode 100644 +index 000000000000..8f515875a34d +--- /dev/null ++++ b/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_0_offset.h +@@ -0,0 +1,32 @@ ++/* ++ * Copyright (C) 2018 Advanced Micro Devices, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included ++ * in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS ++ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN ++ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ++ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ */ ++#ifndef _mmhub_9_4_0_OFFSET_HEADER ++#define _mmhub_9_4_0_OFFSET_HEADER ++ ++ ++// addressBlock: mmhub_utcl2_vmsharedpfdec ++// base address: 0x6a040 ++#define mmMC_VM_XGMI_LFB_CNTL 0x0823 ++#define mmMC_VM_XGMI_LFB_CNTL_BASE_IDX 0 ++#define mmMC_VM_XGMI_LFB_SIZE 0x0824 ++#define mmMC_VM_XGMI_LFB_SIZE_BASE_IDX 0 ++ ++#endif +diff --git a/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_0_sh_mask.h +new file mode 100644 +index 000000000000..0a6b072d191e +--- /dev/null ++++ b/drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_0_sh_mask.h +@@ -0,0 +1,35 @@ ++/* ++ * Copyright (C) 2018 Advanced Micro Devices, Inc. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included ++ * in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS ++ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN ++ * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN ++ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ */ ++#ifndef _mmhub_9_4_0_SH_MASK_HEADER ++#define _mmhub_9_4_0_SH_MASK_HEADER ++ ++ ++// addressBlock: mmhub_utcl2_vmsharedpfdec ++//MC_VM_XGMI_LFB_CNTL ++#define MC_VM_XGMI_LFB_CNTL__PF_LFB_REGION__SHIFT 0x0 ++#define MC_VM_XGMI_LFB_CNTL__PF_MAX_REGION__SHIFT 0x4 ++#define MC_VM_XGMI_LFB_CNTL__PF_LFB_REGION_MASK 0x00000007L ++#define MC_VM_XGMI_LFB_CNTL__PF_MAX_REGION_MASK 0x00000070L ++//MC_VM_XGMI_LFB_SIZE ++#define MC_VM_XGMI_LFB_SIZE__PF_LFB_SIZE__SHIFT 0x0 ++#define MC_VM_XGMI_LFB_SIZE__PF_LFB_SIZE_MASK 0x0000FFFFL ++ ++#endif +-- +2.17.1 + |