diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0888-drm-amd-display-Allow-clock-lower-on-dce100.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/0888-drm-amd-display-Allow-clock-lower-on-dce100.patch | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0888-drm-amd-display-Allow-clock-lower-on-dce100.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0888-drm-amd-display-Allow-clock-lower-on-dce100.patch new file mode 100644 index 00000000..93428861 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0888-drm-amd-display-Allow-clock-lower-on-dce100.patch @@ -0,0 +1,59 @@ +From 0ea93fb00e4c730978ed6f0ddd1884e0c6eaa98b Mon Sep 17 00:00:00 2001 +From: David Francis <David.Francis@amd.com> +Date: Fri, 9 Nov 2018 11:50:18 -0500 +Subject: [PATCH 0888/2940] drm/amd/display: Allow clock lower on dce100 + +dce100 was set to always pass safe_to_lower = false +to the clock manager + +Thus, on suspend the clocks were not being set to 0 +which is incorrect behaviour + +This was causing s3 resume to blackscreen on intel +CPUs with dce100 GPUs attached + +(Note that the hash in this Fixes: tag is the hash on Alex's tree) +Fixes: ae7d8aeb38d7 ("drm/amd/display: remove safe_to_lower flag from dc, use 2 functions instead") + +Signed-off-by: David Francis <David.Francis@amd.com> +Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../amd/display/dc/dce100/dce100_hw_sequencer.c | 14 +++++++++++++- + 1 file changed, 13 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c +index bc50a8e25f4f..87771676acac 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_hw_sequencer.c +@@ -117,6 +117,18 @@ void dce100_prepare_bandwidth( + false); + } + ++void dce100_optimize_bandwidth( ++ struct dc *dc, ++ struct dc_state *context) ++{ ++ dce110_set_safe_displaymarks(&context->res_ctx, dc->res_pool); ++ ++ dc->res_pool->clk_mgr->funcs->update_clocks( ++ dc->res_pool->clk_mgr, ++ context, ++ true); ++} ++ + /**************************************************************************/ + + void dce100_hw_sequencer_construct(struct dc *dc) +@@ -125,6 +137,6 @@ void dce100_hw_sequencer_construct(struct dc *dc) + + dc->hwss.enable_display_power_gating = dce100_enable_display_power_gating; + dc->hwss.prepare_bandwidth = dce100_prepare_bandwidth; +- dc->hwss.optimize_bandwidth = dce100_prepare_bandwidth; ++ dc->hwss.optimize_bandwidth = dce100_optimize_bandwidth; + } + +-- +2.17.1 + |