diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0855-drm-amdgpu-Add-field-in-amdgpu_dev-to-hold-reserved-.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/0855-drm-amdgpu-Add-field-in-amdgpu_dev-to-hold-reserved-.patch | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0855-drm-amdgpu-Add-field-in-amdgpu_dev-to-hold-reserved-.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0855-drm-amdgpu-Add-field-in-amdgpu_dev-to-hold-reserved-.patch new file mode 100644 index 00000000..020bf1d0 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0855-drm-amdgpu-Add-field-in-amdgpu_dev-to-hold-reserved-.patch @@ -0,0 +1,91 @@ +From 364f497453d89eab27d4d1e941c570d3df64c384 Mon Sep 17 00:00:00 2001 +From: Oak Zeng <ozeng@amd.com> +Date: Fri, 16 Nov 2018 19:23:44 -0600 +Subject: [PATCH 0855/2940] drm/amdgpu: Add field in amdgpu_dev to hold + reserved doorbell index + +This is a preparation work to make reserved doorbell index per device, +instead of using a global macro definition. By doing this, we can easily +change doorbell layout for future ASICs while not affecting ASICs in +production. + +Signed-off-by: Oak Zeng <ozeng@amd.com> +Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> +Suggested-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 50 +++++++++++++++++++++++++++++ + 1 file changed, 50 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index 9671f53d44c3..3f0581a7c0f5 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -843,6 +843,55 @@ struct amd_powerplay { + uint32_t pp_feature; + }; + ++/* Reserved doorbells for amdgpu (including multimedia). ++ * KFD can use all the rest in the 2M doorbell bar. ++ * For asic before vega10, doorbell is 32-bit, so the ++ * index/offset is in dword. For vega10 and after, doorbell ++ * can be 64-bit, so the index defined is in qword. ++ */ ++struct amdgpu_doorbell_index { ++ uint32_t kiq; ++ uint32_t mec_ring0; ++ uint32_t mec_ring1; ++ uint32_t mec_ring2; ++ uint32_t mec_ring3; ++ uint32_t mec_ring4; ++ uint32_t mec_ring5; ++ uint32_t mec_ring6; ++ uint32_t mec_ring7; ++ uint32_t userqueue_start; ++ uint32_t userqueue_end; ++ uint32_t gfx_ring0; ++ uint32_t sdma_engine0; ++ uint32_t sdma_engine1; ++ uint32_t sdma_engine2; ++ uint32_t sdma_engine3; ++ uint32_t sdma_engine4; ++ uint32_t sdma_engine5; ++ uint32_t sdma_engine6; ++ uint32_t sdma_engine7; ++ uint32_t ih; ++ union { ++ struct { ++ uint32_t vcn_ring0_1; ++ uint32_t vcn_ring2_3; ++ uint32_t vcn_ring4_5; ++ uint32_t vcn_ring6_7; ++ } vcn; ++ struct { ++ uint32_t uvd_ring0_1; ++ uint32_t uvd_ring2_3; ++ uint32_t uvd_ring4_5; ++ uint32_t uvd_ring6_7; ++ uint32_t vce_ring0_1; ++ uint32_t vce_ring2_3; ++ uint32_t vce_ring4_5; ++ uint32_t vce_ring6_7; ++ } uvd_vce; ++ }; ++ uint32_t max_assignment; ++}; ++ + #define AMDGPU_RESET_MAGIC_NUM 64 + struct amdgpu_device { + struct device *dev; +@@ -1061,6 +1110,7 @@ struct amdgpu_device { + unsigned long last_mm_index; + bool in_gpu_reset; + struct mutex lock_reset; ++ struct amdgpu_doorbell_index doorbell_index; + }; + + static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev) +-- +2.17.1 + |