diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0838-Revert-drm-amd-powerplay-Enable-Disable-NBPSTATE-on-.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/0838-Revert-drm-amd-powerplay-Enable-Disable-NBPSTATE-on-.patch | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0838-Revert-drm-amd-powerplay-Enable-Disable-NBPSTATE-on-.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0838-Revert-drm-amd-powerplay-Enable-Disable-NBPSTATE-on-.patch new file mode 100644 index 00000000..a5147491 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0838-Revert-drm-amd-powerplay-Enable-Disable-NBPSTATE-on-.patch @@ -0,0 +1,52 @@ +From 236595092988aa9aecde5d3c4613d6309f14ca8a Mon Sep 17 00:00:00 2001 +From: Shirish S <shirish.s@amd.com> +Date: Fri, 16 Nov 2018 06:50:28 +0000 +Subject: [PATCH 0838/2940] Revert "drm/amd/powerplay: Enable/Disable NBPSTATE + on On/OFF of UVD" + +This reverts commit dbd8299c32f6f413f6cfe322fe0308f3cfc577e8. + +Reason for revert: +This patch sends msg PPSMC_MSG_DisableLowMemoryPstate(0x002e) +in wrong of sequence to SMU which is before PPSMC_MSG_UVDPowerON (0x0008). +This leads to SMU failing to service the request as it is +dependent on UVD to be powered ON, since it accesses UVD +registers. + +This msg should ideally be sent only when the UVD is about to decode +a 4k video. + +Signed-off-by: Shirish S <shirish.s@amd.com> +Signed-off-by: suresh guttula <suresh.guttula@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c +index fef111ddb736..53cf787560f7 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c +@@ -1228,17 +1228,14 @@ static int smu8_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, + + static int smu8_dpm_powerdown_uvd(struct pp_hwmgr *hwmgr) + { +- if (PP_CAP(PHM_PlatformCaps_UVDPowerGating)) { +- smu8_nbdpm_pstate_enable_disable(hwmgr, true, true); ++ if (PP_CAP(PHM_PlatformCaps_UVDPowerGating)) + return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_UVDPowerOFF); +- } + return 0; + } + + static int smu8_dpm_powerup_uvd(struct pp_hwmgr *hwmgr) + { + if (PP_CAP(PHM_PlatformCaps_UVDPowerGating)) { +- smu8_nbdpm_pstate_enable_disable(hwmgr, false, true); + return smum_send_msg_to_smc_with_parameter( + hwmgr, + PPSMC_MSG_UVDPowerON, +-- +2.17.1 + |