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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0799-drm-amd-display-Clean-up-dp_blank-functions.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.19.8/0799-drm-amd-display-Clean-up-dp_blank-functions.patch97
1 files changed, 97 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0799-drm-amd-display-Clean-up-dp_blank-functions.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0799-drm-amd-display-Clean-up-dp_blank-functions.patch
new file mode 100644
index 00000000..ce7fee14
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0799-drm-amd-display-Clean-up-dp_blank-functions.patch
@@ -0,0 +1,97 @@
+From 683eabff3e5d220d3fd9e32c7c21cd8f013ef01d Mon Sep 17 00:00:00 2001
+From: David Francis <David.Francis@amd.com>
+Date: Wed, 24 Oct 2018 10:08:02 -0400
+Subject: [PATCH 0799/2940] drm/amd/display: Clean up dp_blank functions
+
+[Why]
+Unused variable "refresh" and incorrect comment formatting
+
+[How]
+Remove variable, reindent comments
+
+Signed-off-by: David Francis <David.Francis@amd.com>
+Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
+Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ .../amd/display/dc/dce/dce_stream_encoder.c | 23 ++++++++-----------
+ .../display/dc/dcn10/dcn10_stream_encoder.c | 3 ---
+ 2 files changed, 10 insertions(+), 16 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
+index d65cc8ca1f6b..f518f34f7507 100644
+--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
+@@ -908,7 +908,6 @@ static void dce110_stream_encoder_dp_blank(
+ struct stream_encoder *enc)
+ {
+ struct dce110_stream_encoder *enc110 = DCE110STRENC_FROM_STRENC(enc);
+- uint32_t retries = 0;
+ uint32_t reg1 = 0;
+ uint32_t max_retries = DP_BLANK_MAX_RETRY * 10;
+
+@@ -926,30 +925,28 @@ static void dce110_stream_encoder_dp_blank(
+ * (2 = start of the next vertical blank) */
+ REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, 2);
+ /* Larger delay to wait until VBLANK - use max retry of
+- * 10us*3000=30ms. This covers 16.6ms of typical 60 Hz mode +
+- * a little more because we may not trust delay accuracy.
+- */
++ * 10us*3000=30ms. This covers 16.6ms of typical 60 Hz mode +
++ * a little more because we may not trust delay accuracy.
++ */
+ max_retries = DP_BLANK_MAX_RETRY * 150;
+
+ /* disable DP stream */
+ REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0);
+
+ /* the encoder stops sending the video stream
+- * at the start of the vertical blanking.
+- * Poll for DP_VID_STREAM_STATUS == 0
+- */
++ * at the start of the vertical blanking.
++ * Poll for DP_VID_STREAM_STATUS == 0
++ */
+
+ REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS,
+ 0,
+ 10, max_retries);
+
+- ASSERT(retries <= max_retries);
+-
+ /* Tell the DP encoder to ignore timing from CRTC, must be done after
+- * the polling. If we set DP_STEER_FIFO_RESET before DP stream blank is
+- * complete, stream status will be stuck in video stream enabled state,
+- * i.e. DP_VID_STREAM_STATUS stuck at 1.
+- */
++ * the polling. If we set DP_STEER_FIFO_RESET before DP stream blank is
++ * complete, stream status will be stuck in video stream enabled state,
++ * i.e. DP_VID_STREAM_STATUS stuck at 1.
++ */
+
+ REG_UPDATE(DP_STEER_FIFO, DP_STEER_FIFO_RESET, true);
+ }
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
+index 6f9078f3c4d3..b8b5525a389a 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
+@@ -766,7 +766,6 @@ void enc1_stream_encoder_dp_blank(
+ struct stream_encoder *enc)
+ {
+ struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
+- uint32_t retries = 0;
+ uint32_t reg1 = 0;
+ uint32_t max_retries = DP_BLANK_MAX_RETRY * 10;
+
+@@ -803,8 +802,6 @@ void enc1_stream_encoder_dp_blank(
+ 0,
+ 10, max_retries);
+
+- ASSERT(retries <= max_retries);
+-
+ /* Tell the DP encoder to ignore timing from CRTC, must be done after
+ * the polling. If we set DP_STEER_FIFO_RESET before DP stream blank is
+ * complete, stream status will be stuck in video stream enabled state,
+--
+2.17.1
+