diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0654-drm-amdgpu-Fix-null-point-error.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/0654-drm-amdgpu-Fix-null-point-error.patch | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0654-drm-amdgpu-Fix-null-point-error.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0654-drm-amdgpu-Fix-null-point-error.patch new file mode 100644 index 00000000..83252ab0 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0654-drm-amdgpu-Fix-null-point-error.patch @@ -0,0 +1,96 @@ +From e5ad4feef5d478e0f2cad47ea6ac11028b36ffdb Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Fri, 19 Oct 2018 10:46:53 +0800 +Subject: [PATCH 0654/2940] drm/amdgpu: Fix null point error + +need to check adev->powerplay.pp_funcs first, becasue from +AI, the smu ip can be disabled by user, and the pp_handle +is null in this case. + +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 6 ++++-- + drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 +- + drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 2 +- + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 ++++-- + 4 files changed, 10 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c +index 297a5490ad8c..0a4fba196b84 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c +@@ -135,7 +135,8 @@ static int acp_poweroff(struct generic_pm_domain *genpd) + * 2. power off the acp tiles + * 3. check and enter ulv state + */ +- if (adev->powerplay.pp_funcs->set_powergating_by_smu) ++ if (adev->powerplay.pp_funcs && ++ adev->powerplay.pp_funcs->set_powergating_by_smu) + amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, true); + } + return 0; +@@ -517,7 +518,8 @@ static int acp_set_powergating_state(void *handle, + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + bool enable = state == AMD_PG_STATE_GATE ? true : false; + +- if (adev->powerplay.pp_funcs->set_powergating_by_smu) ++ if (adev->powerplay.pp_funcs && ++ adev->powerplay.pp_funcs->set_powergating_by_smu) + amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, enable); + + return 0; +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +index 790fd5408ddf..1a656b8657f7 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +@@ -392,7 +392,7 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable) + if (!(adev->powerplay.pp_feature & PP_GFXOFF_MASK)) + return; + +- if (!adev->powerplay.pp_funcs->set_powergating_by_smu) ++ if (!adev->powerplay.pp_funcs || !adev->powerplay.pp_funcs->set_powergating_by_smu) + return; + + +diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c +index 017f1a638373..c5506b0bc90d 100644 +--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c +@@ -279,7 +279,7 @@ void mmhub_v1_0_update_power_gating(struct amdgpu_device *adev, + return; + + if (enable && adev->pg_flags & AMD_PG_SUPPORT_MMHUB) { +- if (adev->powerplay.pp_funcs->set_powergating_by_smu) ++ if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->set_powergating_by_smu) + amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GMC, true); + + } +diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +index 04fa3d972636..7a8c9172d30a 100644 +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +@@ -1366,7 +1366,8 @@ static int sdma_v4_0_hw_init(void *handle) + int r; + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + +- if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu) ++ if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs && ++ adev->powerplay.pp_funcs->set_powergating_by_smu) + amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false); + + sdma_v4_0_init_golden_registers(adev); +@@ -1386,7 +1387,8 @@ static int sdma_v4_0_hw_fini(void *handle) + sdma_v4_0_ctx_switch_enable(adev, false); + sdma_v4_0_enable(adev, false); + +- if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs->set_powergating_by_smu) ++ if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs ++ && adev->powerplay.pp_funcs->set_powergating_by_smu) + amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true); + + return 0; +-- +2.17.1 + |