diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0495-drm-amdgpu-split-ip-hw_init-into-2-phases.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/0495-drm-amdgpu-split-ip-hw_init-into-2-phases.patch | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0495-drm-amdgpu-split-ip-hw_init-into-2-phases.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0495-drm-amdgpu-split-ip-hw_init-into-2-phases.patch new file mode 100644 index 00000000..6bc49a99 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0495-drm-amdgpu-split-ip-hw_init-into-2-phases.patch @@ -0,0 +1,103 @@ +From 97d14a05dd045756421ee83fd5ac50a64ed3d9f5 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Wed, 10 Oct 2018 19:28:30 +0800 +Subject: [PATCH 0495/2940] drm/amdgpu: split ip hw_init into 2 phases + +We need to do some IPs earlier to deal with ordering issues +similar to how resume is split into two phases. + +Will do fw loading via smu/psp between the two phases. + +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 66 +++++++++++++++++----- + 1 file changed, 53 insertions(+), 13 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index ef99bc8ce635..26e7c85d879e 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -1573,6 +1573,51 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev) + return 0; + } + ++static int amdgpu_device_ip_hw_init_phase1(struct amdgpu_device *adev) ++{ ++ int i, r; ++ ++ for (i = 0; i < adev->num_ip_blocks; i++) { ++ if (!adev->ip_blocks[i].status.sw) ++ continue; ++ if (adev->ip_blocks[i].status.hw) ++ continue; ++ if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON || ++ adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH) { ++ r = adev->ip_blocks[i].version->funcs->hw_init(adev); ++ if (r) { ++ DRM_ERROR("hw_init of IP block <%s> failed %d\n", ++ adev->ip_blocks[i].version->funcs->name, r); ++ return r; ++ } ++ adev->ip_blocks[i].status.hw = true; ++ } ++ } ++ ++ return 0; ++} ++ ++static int amdgpu_device_ip_hw_init_phase2(struct amdgpu_device *adev) ++{ ++ int i, r; ++ ++ for (i = 0; i < adev->num_ip_blocks; i++) { ++ if (!adev->ip_blocks[i].status.sw) ++ continue; ++ if (adev->ip_blocks[i].status.hw) ++ continue; ++ r = adev->ip_blocks[i].version->funcs->hw_init(adev); ++ if (r) { ++ DRM_ERROR("hw_init of IP block <%s> failed %d\n", ++ adev->ip_blocks[i].version->funcs->name, r); ++ return r; ++ } ++ adev->ip_blocks[i].status.hw = true; ++ } ++ ++ return 0; ++} ++ + /** + * amdgpu_device_ip_init - run init for hardware IPs + * +@@ -1632,19 +1677,14 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev) + r = amdgpu_ucode_create_bo(adev); /* create ucode bo when sw_init complete*/ + if (r) + return r; +- for (i = 0; i < adev->num_ip_blocks; i++) { +- if (!adev->ip_blocks[i].status.sw) +- continue; +- if (adev->ip_blocks[i].status.hw) +- continue; +- r = adev->ip_blocks[i].version->funcs->hw_init((void *)adev); +- if (r) { +- DRM_ERROR("hw_init of IP block <%s> failed %d\n", +- adev->ip_blocks[i].version->funcs->name, r); +- return r; +- } +- adev->ip_blocks[i].status.hw = true; +- } ++ ++ r = amdgpu_device_ip_hw_init_phase1(adev); ++ if (r) ++ return r; ++ ++ r = amdgpu_device_ip_hw_init_phase2(adev); ++ if (r) ++ return r; + + amdgpu_xgmi_add_device(adev); + amdgpu_amdkfd_device_init(adev); +-- +2.17.1 + |