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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0486-drm-amdgpu-add-CP_DEBUG-register-definition-for-GC9..patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.19.8/0486-drm-amdgpu-add-CP_DEBUG-register-definition-for-GC9..patch34
1 files changed, 34 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0486-drm-amdgpu-add-CP_DEBUG-register-definition-for-GC9..patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0486-drm-amdgpu-add-CP_DEBUG-register-definition-for-GC9..patch
new file mode 100644
index 00000000..f18de16c
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0486-drm-amdgpu-add-CP_DEBUG-register-definition-for-GC9..patch
@@ -0,0 +1,34 @@
+From cdbc3ab1cb423f5e499deaa00e919bf38dc1f512 Mon Sep 17 00:00:00 2001
+From: Tao Zhou <tao.zhou1@amd.com>
+Date: Tue, 9 Oct 2018 11:30:36 +0800
+Subject: [PATCH 0486/2940] drm/amdgpu: add CP_DEBUG register definition for
+ GC9.0
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Add CP_DEBUG register definition.
+
+Change-Id: I38b0e5accc9ed2f516f409f1ffd88a9690356083
+Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
+Acked-by: Christian König <christian.koenig@amd.com>
+---
+ drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
+index 4ce090db7ef7..529b37db274c 100644
+--- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
++++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
+@@ -2449,6 +2449,8 @@
+ #define mmCP_ECC_FIRSTOCCURRENCE_RING2_BASE_IDX 0
+ #define mmGB_EDC_MODE 0x107e
+ #define mmGB_EDC_MODE_BASE_IDX 0
++#define mmCP_DEBUG 0x107f
++#define mmCP_DEBUG_BASE_IDX 0
+ #define mmCP_CPF_DEBUG 0x1080
+ #define mmCP_PQ_WPTR_POLL_CNTL 0x1083
+ #define mmCP_PQ_WPTR_POLL_CNTL_BASE_IDX 0
+--
+2.17.1
+