diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0410-Revert-drm-amdgpu-Change-the-gfx-sdma-init-fini-sequ.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/0410-Revert-drm-amdgpu-Change-the-gfx-sdma-init-fini-sequ.patch | 393 |
1 files changed, 393 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0410-Revert-drm-amdgpu-Change-the-gfx-sdma-init-fini-sequ.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0410-Revert-drm-amdgpu-Change-the-gfx-sdma-init-fini-sequ.patch new file mode 100644 index 00000000..15886a5d --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0410-Revert-drm-amdgpu-Change-the-gfx-sdma-init-fini-sequ.patch @@ -0,0 +1,393 @@ +From 80de4dcf78ad8696a09da8b9ddadc081758a49bb Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Tue, 25 Sep 2018 21:49:40 +0800 +Subject: [PATCH 0410/2940] Revert "drm/amdgpu: Change the gfx/sdma init/fini + sequence" + +This reverts commit 91079a250cbe2b6f4f0215610744b068f60a4d62. + +This change will break the initialize on RV/Vega. +so revert it. + +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/cik.c | 17 +++++++------ + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 11 ++------- + drivers/gpu/drm/amd/amdgpu/si.c | 13 +++++----- + drivers/gpu/drm/amd/amdgpu/soc15.c | 8 +++---- + drivers/gpu/drm/amd/amdgpu/vi.c | 24 +++++++++---------- + drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 16 +++---------- + drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 18 ++++++++++++++ + 7 files changed, 53 insertions(+), 54 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c +index f41f5f57e9f3..78ab939ae5d8 100644 +--- a/drivers/gpu/drm/amd/amdgpu/cik.c ++++ b/drivers/gpu/drm/amd/amdgpu/cik.c +@@ -2002,8 +2002,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &cik_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block); + amdgpu_device_ip_block_add(adev, &cik_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block); +- amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + if (amdgpu_dpm == -1) + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + else +@@ -2016,6 +2014,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v8_2_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block); ++ amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block); + break; +@@ -2023,8 +2023,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &cik_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block); + amdgpu_device_ip_block_add(adev, &cik_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v7_3_ip_block); +- amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + if (amdgpu_dpm == -1) + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + else +@@ -2037,6 +2035,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v8_5_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v7_3_ip_block); ++ amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block); + break; +@@ -2044,8 +2044,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &cik_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block); + amdgpu_device_ip_block_add(adev, &cik_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v7_1_ip_block); +- amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + amdgpu_device_ip_block_add(adev, &kv_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -2055,7 +2053,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v8_1_ip_block); +- ++ amdgpu_device_ip_block_add(adev, &gfx_v7_1_ip_block); ++ amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block); + break; +@@ -2064,8 +2063,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &cik_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block); + amdgpu_device_ip_block_add(adev, &cik_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block); +- amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + amdgpu_device_ip_block_add(adev, &kv_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -2075,6 +2072,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v8_3_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block); ++ amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block); + break; +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +index 6ca2a5ccf642..463d07e186d4 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -4216,17 +4216,10 @@ static int gfx_v8_0_rlc_resume(struct amdgpu_device *adev) + if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) { + /* legacy rlc firmware loading */ + r = gfx_v8_0_rlc_load_microcode(adev); +- } else if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU && adev->powerplay.pp_funcs->load_firmware) { +- amdgpu_ucode_init_bo(adev); +- r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle); +- } else { +- r = -EINVAL; ++ if (r) ++ return r; + } + +- if (r) { +- pr_err("firmware loading failed\n"); +- return r; +- } + gfx_v8_0_rlc_start(adev); + + return 0; +diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c +index f8408f88cd37..c364ef94cc36 100644 +--- a/drivers/gpu/drm/amd/amdgpu/si.c ++++ b/drivers/gpu/drm/amd/amdgpu/si.c +@@ -2057,13 +2057,13 @@ int si_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &si_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block); + amdgpu_device_ip_block_add(adev, &si_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); +- amdgpu_device_ip_block_add(adev, &si_dma_ip_block); + amdgpu_device_ip_block_add(adev, &si_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); + else + amdgpu_device_ip_block_add(adev, &dce_v6_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &si_dma_ip_block); + /* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block); */ + /* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */ + break; +@@ -2071,14 +2071,13 @@ int si_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &si_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block); + amdgpu_device_ip_block_add(adev, &si_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); +- amdgpu_device_ip_block_add(adev, &si_dma_ip_block); + amdgpu_device_ip_block_add(adev, &si_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); + else + amdgpu_device_ip_block_add(adev, &dce_v6_4_ip_block); +- ++ amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &si_dma_ip_block); + /* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block); */ + /* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */ + break; +@@ -2086,11 +2085,11 @@ int si_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &si_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block); + amdgpu_device_ip_block_add(adev, &si_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); +- amdgpu_device_ip_block_add(adev, &si_dma_ip_block); + amdgpu_device_ip_block_add(adev, &si_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &si_dma_ip_block); + break; + default: + BUG(); +diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c +index c4edd9ac0599..bae16d942c21 100644 +--- a/drivers/gpu/drm/amd/amdgpu/soc15.c ++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c +@@ -529,8 +529,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block); + else + amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); + if (!amdgpu_sriov_vf(adev)) + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) +@@ -541,6 +539,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) + #else + # warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15." + #endif ++ amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); + if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) { + amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block); +@@ -551,8 +551,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); + amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); + amdgpu_device_ip_block_add(adev, &psp_v10_0_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -562,6 +560,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) + #else + # warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15." + #endif ++ amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); + amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block); + break; + default: +diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c +index 272711908880..88b57a5e9489 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vi.c ++++ b/drivers/gpu/drm/amd/amdgpu/vi.c +@@ -1596,18 +1596,16 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &vi_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v7_4_ip_block); + amdgpu_device_ip_block_add(adev, &iceland_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block); + break; + case CHIP_FIJI: + amdgpu_device_ip_block_add(adev, &vi_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v8_5_ip_block); + amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -1617,6 +1615,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v10_1_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + if (!amdgpu_sriov_vf(adev)) { + amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block); +@@ -1626,8 +1626,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &vi_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block); + amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -1637,6 +1635,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v10_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + if (!amdgpu_sriov_vf(adev)) { + amdgpu_device_ip_block_add(adev, &uvd_v5_0_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block); +@@ -1649,8 +1649,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &vi_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v8_1_ip_block); + amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -1660,6 +1658,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v11_2_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v6_3_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block); + break; +@@ -1667,8 +1667,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &vi_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block); + amdgpu_device_ip_block_add(adev, &cz_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -1678,6 +1676,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v3_1_ip_block); + #if defined(CONFIG_DRM_AMD_ACP) +@@ -1688,8 +1688,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &vi_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block); + amdgpu_device_ip_block_add(adev, &cz_ih_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -1699,6 +1697,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v6_2_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block); + #if defined(CONFIG_DRM_AMD_ACP) +diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +index f486d509ac56..da4ebff5b74d 100644 +--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c ++++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +@@ -124,6 +124,9 @@ static int pp_hw_init(void *handle) + struct amdgpu_device *adev = handle; + struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; + ++ if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU) ++ amdgpu_ucode_init_bo(adev); ++ + ret = hwmgr_hw_init(hwmgr); + + if (ret) +@@ -272,19 +275,6 @@ const struct amdgpu_ip_block_version pp_smu_ip_block = + + static int pp_dpm_load_fw(void *handle) + { +- struct pp_hwmgr *hwmgr = handle; +- int ret = 0; +- +- if (!hwmgr || !hwmgr->smumgr_funcs) +- return -EINVAL; +- +- if (hwmgr->smumgr_funcs->start_smu) { +- ret = hwmgr->smumgr_funcs->start_smu(hwmgr); +- if (ret) { +- pr_err("smc start failed\n"); +- return ret; +- } +- } + return 0; + } + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +index deb0e475cc7e..7500a3e61dba 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +@@ -209,6 +209,17 @@ int hwmgr_hw_init(struct pp_hwmgr *hwmgr) + { + int ret = 0; + ++ if (!hwmgr || !hwmgr->smumgr_funcs) ++ return -EINVAL; ++ ++ if (hwmgr->smumgr_funcs->start_smu) { ++ ret = hwmgr->smumgr_funcs->start_smu(hwmgr); ++ if (ret) { ++ pr_err("smc start failed\n"); ++ return -EINVAL; ++ } ++ } ++ + if (!hwmgr->pm_en) + return 0; + +@@ -309,6 +320,13 @@ int hwmgr_resume(struct pp_hwmgr *hwmgr) + if (!hwmgr) + return -EINVAL; + ++ if (hwmgr->smumgr_funcs && hwmgr->smumgr_funcs->start_smu) { ++ if (hwmgr->smumgr_funcs->start_smu(hwmgr)) { ++ pr_err("smc start failed\n"); ++ return -EINVAL; ++ } ++ } ++ + if (!hwmgr->pm_en) + return 0; + +-- +2.17.1 + |