diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0407-drm-amdgpu-Change-the-gfx-sdma-init-fini-sequence.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/0407-drm-amdgpu-Change-the-gfx-sdma-init-fini-sequence.patch | 391 |
1 files changed, 391 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0407-drm-amdgpu-Change-the-gfx-sdma-init-fini-sequence.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0407-drm-amdgpu-Change-the-gfx-sdma-init-fini-sequence.patch new file mode 100644 index 00000000..6eaf1b18 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0407-drm-amdgpu-Change-the-gfx-sdma-init-fini-sequence.patch @@ -0,0 +1,391 @@ +From 7ab679f4d4ba0977a8d3ecf3c3f73294d870c736 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Thu, 20 Sep 2018 11:19:59 +0800 +Subject: [PATCH 0407/2940] drm/amdgpu: Change the gfx/sdma init/fini sequence + +initialize gfx/sdma before dpm features enabled. +and disable dpm features before gfx/sdma fini. + +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/cik.c | 17 ++++++------- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 11 +++++++-- + drivers/gpu/drm/amd/amdgpu/si.c | 13 +++++----- + drivers/gpu/drm/amd/amdgpu/soc15.c | 8 +++---- + drivers/gpu/drm/amd/amdgpu/vi.c | 24 +++++++++---------- + drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 16 ++++++++++--- + drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 18 -------------- + 7 files changed, 54 insertions(+), 53 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c +index 78ab939ae5d8..f41f5f57e9f3 100644 +--- a/drivers/gpu/drm/amd/amdgpu/cik.c ++++ b/drivers/gpu/drm/amd/amdgpu/cik.c +@@ -2002,6 +2002,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &cik_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block); + amdgpu_device_ip_block_add(adev, &cik_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block); ++ amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + if (amdgpu_dpm == -1) + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + else +@@ -2014,8 +2016,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v8_2_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block); +- amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block); + break; +@@ -2023,6 +2023,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &cik_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block); + amdgpu_device_ip_block_add(adev, &cik_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v7_3_ip_block); ++ amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + if (amdgpu_dpm == -1) + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + else +@@ -2035,8 +2037,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v8_5_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v7_3_ip_block); +- amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block); + break; +@@ -2044,6 +2044,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &cik_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block); + amdgpu_device_ip_block_add(adev, &cik_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v7_1_ip_block); ++ amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + amdgpu_device_ip_block_add(adev, &kv_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -2053,8 +2055,7 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v8_1_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v7_1_ip_block); +- amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); ++ + amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block); + break; +@@ -2063,6 +2064,8 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &cik_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v7_0_ip_block); + amdgpu_device_ip_block_add(adev, &cik_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block); ++ amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + amdgpu_device_ip_block_add(adev, &kv_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -2072,8 +2075,6 @@ int cik_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v8_3_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v7_2_ip_block); +- amdgpu_device_ip_block_add(adev, &cik_sdma_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v4_2_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v2_0_ip_block); + break; +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +index 463d07e186d4..6ca2a5ccf642 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -4216,10 +4216,17 @@ static int gfx_v8_0_rlc_resume(struct amdgpu_device *adev) + if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) { + /* legacy rlc firmware loading */ + r = gfx_v8_0_rlc_load_microcode(adev); +- if (r) +- return r; ++ } else if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU && adev->powerplay.pp_funcs->load_firmware) { ++ amdgpu_ucode_init_bo(adev); ++ r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle); ++ } else { ++ r = -EINVAL; + } + ++ if (r) { ++ pr_err("firmware loading failed\n"); ++ return r; ++ } + gfx_v8_0_rlc_start(adev); + + return 0; +diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c +index c364ef94cc36..f8408f88cd37 100644 +--- a/drivers/gpu/drm/amd/amdgpu/si.c ++++ b/drivers/gpu/drm/amd/amdgpu/si.c +@@ -2057,13 +2057,13 @@ int si_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &si_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block); + amdgpu_device_ip_block_add(adev, &si_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &si_dma_ip_block); + amdgpu_device_ip_block_add(adev, &si_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); + else + amdgpu_device_ip_block_add(adev, &dce_v6_0_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); +- amdgpu_device_ip_block_add(adev, &si_dma_ip_block); + /* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block); */ + /* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */ + break; +@@ -2071,13 +2071,14 @@ int si_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &si_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block); + amdgpu_device_ip_block_add(adev, &si_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &si_dma_ip_block); + amdgpu_device_ip_block_add(adev, &si_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); + else + amdgpu_device_ip_block_add(adev, &dce_v6_4_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); +- amdgpu_device_ip_block_add(adev, &si_dma_ip_block); ++ + /* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block); */ + /* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */ + break; +@@ -2085,11 +2086,11 @@ int si_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &si_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v6_0_ip_block); + amdgpu_device_ip_block_add(adev, &si_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &si_dma_ip_block); + amdgpu_device_ip_block_add(adev, &si_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v6_0_ip_block); +- amdgpu_device_ip_block_add(adev, &si_dma_ip_block); + break; + default: + BUG(); +diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c +index bae16d942c21..c4edd9ac0599 100644 +--- a/drivers/gpu/drm/amd/amdgpu/soc15.c ++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c +@@ -529,6 +529,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block); + else + amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); + if (!amdgpu_sriov_vf(adev)) + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) +@@ -539,8 +541,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) + #else + # warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15." + #endif +- amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); + if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) { + amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block); +@@ -551,6 +551,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); + amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); + amdgpu_device_ip_block_add(adev, &psp_v10_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -560,8 +562,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) + #else + # warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15." + #endif +- amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); + amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block); + break; + default: +diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c +index 88b57a5e9489..272711908880 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vi.c ++++ b/drivers/gpu/drm/amd/amdgpu/vi.c +@@ -1596,16 +1596,18 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &vi_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v7_4_ip_block); + amdgpu_device_ip_block_add(adev, &iceland_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v2_4_ip_block); + break; + case CHIP_FIJI: + amdgpu_device_ip_block_add(adev, &vi_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v8_5_ip_block); + amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -1615,8 +1617,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v10_1_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + if (!amdgpu_sriov_vf(adev)) { + amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block); +@@ -1626,6 +1626,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &vi_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block); + amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -1635,8 +1637,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v10_0_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + if (!amdgpu_sriov_vf(adev)) { + amdgpu_device_ip_block_add(adev, &uvd_v5_0_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v3_0_ip_block); +@@ -1649,6 +1649,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &vi_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v8_1_ip_block); + amdgpu_device_ip_block_add(adev, &tonga_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -1658,8 +1660,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v11_2_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v3_1_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v6_3_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block); + break; +@@ -1667,6 +1667,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &vi_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block); + amdgpu_device_ip_block_add(adev, &cz_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -1676,8 +1678,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v6_0_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v3_1_ip_block); + #if defined(CONFIG_DRM_AMD_ACP) +@@ -1688,6 +1688,8 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + amdgpu_device_ip_block_add(adev, &vi_common_ip_block); + amdgpu_device_ip_block_add(adev, &gmc_v8_0_ip_block); + amdgpu_device_ip_block_add(adev, &cz_ih_ip_block); ++ amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); ++ amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block); + amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); + if (adev->enable_virtual_display) + amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); +@@ -1697,8 +1699,6 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) + #endif + else + amdgpu_device_ip_block_add(adev, &dce_v11_0_ip_block); +- amdgpu_device_ip_block_add(adev, &gfx_v8_1_ip_block); +- amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block); + amdgpu_device_ip_block_add(adev, &uvd_v6_2_ip_block); + amdgpu_device_ip_block_add(adev, &vce_v3_4_ip_block); + #if defined(CONFIG_DRM_AMD_ACP) +diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +index da4ebff5b74d..f486d509ac56 100644 +--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c ++++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c +@@ -124,9 +124,6 @@ static int pp_hw_init(void *handle) + struct amdgpu_device *adev = handle; + struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; + +- if (adev->firmware.load_type == AMDGPU_FW_LOAD_SMU) +- amdgpu_ucode_init_bo(adev); +- + ret = hwmgr_hw_init(hwmgr); + + if (ret) +@@ -275,6 +272,19 @@ const struct amdgpu_ip_block_version pp_smu_ip_block = + + static int pp_dpm_load_fw(void *handle) + { ++ struct pp_hwmgr *hwmgr = handle; ++ int ret = 0; ++ ++ if (!hwmgr || !hwmgr->smumgr_funcs) ++ return -EINVAL; ++ ++ if (hwmgr->smumgr_funcs->start_smu) { ++ ret = hwmgr->smumgr_funcs->start_smu(hwmgr); ++ if (ret) { ++ pr_err("smc start failed\n"); ++ return ret; ++ } ++ } + return 0; + } + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +index 7500a3e61dba..deb0e475cc7e 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +@@ -209,17 +209,6 @@ int hwmgr_hw_init(struct pp_hwmgr *hwmgr) + { + int ret = 0; + +- if (!hwmgr || !hwmgr->smumgr_funcs) +- return -EINVAL; +- +- if (hwmgr->smumgr_funcs->start_smu) { +- ret = hwmgr->smumgr_funcs->start_smu(hwmgr); +- if (ret) { +- pr_err("smc start failed\n"); +- return -EINVAL; +- } +- } +- + if (!hwmgr->pm_en) + return 0; + +@@ -320,13 +309,6 @@ int hwmgr_resume(struct pp_hwmgr *hwmgr) + if (!hwmgr) + return -EINVAL; + +- if (hwmgr->smumgr_funcs && hwmgr->smumgr_funcs->start_smu) { +- if (hwmgr->smumgr_funcs->start_smu(hwmgr)) { +- pr_err("smc start failed\n"); +- return -EINVAL; +- } +- } +- + if (!hwmgr->pm_en) + return 0; + +-- +2.17.1 + |