diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0287-drm-amdgpu-use-processed-values-for-counting.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/0287-drm-amdgpu-use-processed-values-for-counting.patch | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0287-drm-amdgpu-use-processed-values-for-counting.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0287-drm-amdgpu-use-processed-values-for-counting.patch new file mode 100644 index 00000000..9fce47be --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0287-drm-amdgpu-use-processed-values-for-counting.patch @@ -0,0 +1,62 @@ +From b3f3f20edb760a5e2c1ad3a58cec23f4578163c0 Mon Sep 17 00:00:00 2001 +From: "A. Wilcox" <AWilcox@Wilcox-Tech.com> +Date: Sun, 1 Jul 2018 22:44:52 -0500 +Subject: [PATCH 0287/2940] drm/amdgpu: use processed values for counting + +adev->gfx.rlc has the values from rlc_hdr already processed by +le32_to_cpu. Using the rlc_hdr values on big-endian machines causes +a kernel Oops due to writing well outside of the array (0x24000000 +instead of 0x24). + +Signed-off-by: A. Wilcox <AWilcox@Wilcox-Tech.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 ++-- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++-- + 2 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +index 3882689b2d8f..11e6ccdfc3d1 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -1114,14 +1114,14 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) + + tmp = (unsigned int *)((uintptr_t)rlc_hdr + + le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes)); +- for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++) ++ for (i = 0 ; i < (adev->gfx.rlc.reg_list_format_size_bytes >> 2); i++) + adev->gfx.rlc.register_list_format[i] = le32_to_cpu(tmp[i]); + + adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i; + + tmp = (unsigned int *)((uintptr_t)rlc_hdr + + le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes)); +- for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++) ++ for (i = 0 ; i < (adev->gfx.rlc.reg_list_size_bytes >> 2); i++) + adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]); + + if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index 9c6d9429afbf..53758837875b 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -692,14 +692,14 @@ static int gfx_v9_0_init_microcode(struct amdgpu_device *adev) + + tmp = (unsigned int *)((uintptr_t)rlc_hdr + + le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes)); +- for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++) ++ for (i = 0 ; i < (adev->gfx.rlc.reg_list_format_size_bytes >> 2); i++) + adev->gfx.rlc.register_list_format[i] = le32_to_cpu(tmp[i]); + + adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i; + + tmp = (unsigned int *)((uintptr_t)rlc_hdr + + le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes)); +- for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++) ++ for (i = 0 ; i < (adev->gfx.rlc.reg_list_size_bytes >> 2); i++) + adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]); + + if (adev->gfx.rlc.is_rlc_v2_1) +-- +2.17.1 + |