diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0248-drm-amdgpu-add-picasso-support-for-sdma_v4.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/0248-drm-amdgpu-add-picasso-support-for-sdma_v4.patch | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0248-drm-amdgpu-add-picasso-support-for-sdma_v4.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0248-drm-amdgpu-add-picasso-support-for-sdma_v4.patch new file mode 100644 index 00000000..5781b6df --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0248-drm-amdgpu-add-picasso-support-for-sdma_v4.patch @@ -0,0 +1,81 @@ +From eb6cfa7c531e412f0398905f821d177c3b441407 Mon Sep 17 00:00:00 2001 +From: Likun Gao <Likun.Gao@amd.com> +Date: Tue, 10 Jul 2018 20:30:42 +0800 +Subject: [PATCH 0248/2940] drm/amdgpu: add picasso support for sdma_v4 + +Add sdma support to picasso + +Signed-off-by: Likun Gao <Likun.Gao@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +index 2ffa382b3c11..5fea013471e1 100644 +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +@@ -48,6 +48,7 @@ MODULE_FIRMWARE("amdgpu/vega12_sdma1.bin"); + MODULE_FIRMWARE("amdgpu/vega20_sdma.bin"); + MODULE_FIRMWARE("amdgpu/vega20_sdma1.bin"); + MODULE_FIRMWARE("amdgpu/raven_sdma.bin"); ++MODULE_FIRMWARE("amdgpu/picasso_sdma.bin"); + + #define SDMA0_POWER_CNTL__ON_OFF_CONDITION_HOLD_TIME_MASK 0x000000F8L + #define SDMA0_POWER_CNTL__ON_OFF_STATUS_DURATION_TIME_MASK 0xFC000000L +@@ -221,6 +222,7 @@ static void sdma_v4_0_init_golden_registers(struct amdgpu_device *adev) + ARRAY_SIZE(golden_settings_sdma1_4_2)); + break; + case CHIP_RAVEN: ++ case CHIP_PICASSO: + soc15_program_register_sequence(adev, + golden_settings_sdma_4_1, + ARRAY_SIZE(golden_settings_sdma_4_1)); +@@ -269,6 +271,9 @@ static int sdma_v4_0_init_microcode(struct amdgpu_device *adev) + case CHIP_RAVEN: + chip_name = "raven"; + break; ++ case CHIP_PICASSO: ++ chip_name = "picasso"; ++ break; + default: + BUG(); + } +@@ -849,6 +854,7 @@ static void sdma_v4_0_init_pg(struct amdgpu_device *adev) + + switch (adev->asic_type) { + case CHIP_RAVEN: ++ case CHIP_PICASSO: + sdma_v4_1_init_power_gating(adev); + sdma_v4_1_update_power_gating(adev, true); + break; +@@ -1256,7 +1262,7 @@ static int sdma_v4_0_early_init(void *handle) + { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + +- if (adev->asic_type == CHIP_RAVEN) ++ if (adev->asic_type == CHIP_RAVEN || adev->asic_type == CHIP_PICASSO) + adev->sdma.num_instances = 1; + else + adev->sdma.num_instances = 2; +@@ -1605,6 +1611,7 @@ static int sdma_v4_0_set_clockgating_state(void *handle, + case CHIP_VEGA12: + case CHIP_VEGA20: + case CHIP_RAVEN: ++ case CHIP_PICASSO: + sdma_v4_0_update_medium_grain_clock_gating(adev, + state == AMD_CG_STATE_GATE ? true : false); + sdma_v4_0_update_medium_grain_light_sleep(adev, +@@ -1623,6 +1630,7 @@ static int sdma_v4_0_set_powergating_state(void *handle, + + switch (adev->asic_type) { + case CHIP_RAVEN: ++ case CHIP_PICASSO: + sdma_v4_1_update_power_gating(adev, + state == AMD_PG_STATE_GATE ? true : false); + break; +-- +2.17.1 + |