diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/0051-drm-amd-display-Add-dprefclk-value-to-dce_dccg.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/0051-drm-amd-display-Add-dprefclk-value-to-dce_dccg.patch | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/0051-drm-amd-display-Add-dprefclk-value-to-dce_dccg.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/0051-drm-amd-display-Add-dprefclk-value-to-dce_dccg.patch new file mode 100644 index 00000000..d2784666 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/0051-drm-amd-display-Add-dprefclk-value-to-dce_dccg.patch @@ -0,0 +1,60 @@ +From 83b94eccd87c03736672b243eaf273633f0415de Mon Sep 17 00:00:00 2001 +From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Date: Mon, 30 Jul 2018 14:41:01 -0400 +Subject: [PATCH 0051/2940] drm/amd/display: Add dprefclk value to dce_dccg + +This allows us to avoid any vbios bugs when initializing clocks + +Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c | 4 +++- + drivers/gpu/drm/amd/display/dc/dce/dce_clocks.h | 1 + + 2 files changed, 4 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c +index 3b3264938941..1f755368b92e 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c ++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c +@@ -202,7 +202,7 @@ static int dce12_get_dp_ref_freq_khz(struct dccg *clk) + { + struct dce_dccg *clk_dce = TO_DCE_CLOCKS(clk); + +- return dccg_adjust_dp_ref_freq_for_ss(clk_dce, 600000); ++ return dccg_adjust_dp_ref_freq_for_ss(clk_dce, clk_dce->dprefclk_khz); + } + + static enum dm_pp_clocks_state dce_get_required_clocks_state( +@@ -885,6 +885,7 @@ struct dccg *dce120_dccg_create(struct dc_context *ctx) + dce_dccg_construct( + clk_dce, ctx, NULL, NULL, NULL); + ++ clk_dce->dprefclk_khz = 600000; + clk_dce->base.funcs = &dce120_funcs; + + return &clk_dce->base; +@@ -912,6 +913,7 @@ struct dccg *dcn1_dccg_create(struct dc_context *ctx) + clk_dce->dprefclk_ss_divider = 1000; + clk_dce->ss_on_dprefclk = false; + ++ clk_dce->dprefclk_khz = 600000; + if (bp->integrated_info) + clk_dce->dentist_vco_freq_khz = bp->integrated_info->dentist_vco_freq; + if (clk_dce->dentist_vco_freq_khz == 0) { +diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.h b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.h +index 8be68eb000c5..9179173a26c2 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.h ++++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clocks.h +@@ -90,6 +90,7 @@ struct dce_dccg { + int dprefclk_ss_percentage; + /* DPREFCLK SS percentage Divider (100 or 1000) */ + int dprefclk_ss_divider; ++ int dprefclk_khz; + }; + + +-- +2.17.1 + |