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-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/5762-net-phy-marvell10g-update-header-comments.patch43
1 files changed, 43 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/5762-net-phy-marvell10g-update-header-comments.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/5762-net-phy-marvell10g-update-header-comments.patch
new file mode 100644
index 00000000..692e419f
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/5762-net-phy-marvell10g-update-header-comments.patch
@@ -0,0 +1,43 @@
+From 231159c6d1a9ec9c43435a2e166f0c325f41f5df Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Fri, 29 Dec 2017 12:46:22 +0000
+Subject: [PATCH 5762/5765] net: phy: marvell10g: update header comments
+
+Update header comments to indicate the newly found behaviour with XAUI
+interfaces.
+
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com>
+---
+ drivers/net/phy/marvell10g.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
+index f0cfba4e758b..37ba68d7c385 100644
+--- a/drivers/net/phy/marvell10g.c
++++ b/drivers/net/phy/marvell10g.c
+@@ -6,12 +6,18 @@
+ *
+ * There appears to be several different data paths through the PHY which
+ * are automatically managed by the PHY. The following has been determined
+- * via observation and experimentation:
++ * via observation and experimentation for a setup using single-lane Serdes:
+ *
+ * SGMII PHYXS -- BASE-T PCS -- 10G PMA -- AN -- Copper (for <= 1G)
+ * 10GBASE-KR PHYXS -- BASE-T PCS -- 10G PMA -- AN -- Copper (for 10G)
+ * 10GBASE-KR PHYXS -- BASE-R PCS -- Fiber
+ *
++ * With XAUI, observation shows:
++ *
++ * XAUI PHYXS -- <appropriate PCS as above>
++ *
++ * and no switching of the host interface mode occurs.
++ *
+ * If both the fiber and copper ports are connected, the first to gain
+ * link takes priority and the other port is completely locked out.
+ */
+--
+2.17.1
+