diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/5564-drm-amdgpu-vcn-Move-SPG-mode-mc-resume-after-MPC-con.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/5564-drm-amdgpu-vcn-Move-SPG-mode-mc-resume-after-MPC-con.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/5564-drm-amdgpu-vcn-Move-SPG-mode-mc-resume-after-MPC-con.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/5564-drm-amdgpu-vcn-Move-SPG-mode-mc-resume-after-MPC-con.patch new file mode 100644 index 00000000..bf4f3a42 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/5564-drm-amdgpu-vcn-Move-SPG-mode-mc-resume-after-MPC-con.patch @@ -0,0 +1,40 @@ +From 86e1bc245fcf02167966b187fca9694bc798fb74 Mon Sep 17 00:00:00 2001 +From: James Zhu <James.Zhu@amd.com> +Date: Tue, 9 Oct 2018 16:46:53 -0400 +Subject: [PATCH 5564/5725] drm/amdgpu/vcn:Move SPG mode mc resume after MPC + control + +Move Static Power Gate mode mc resume after MPC control + +Signed-off-by: James Zhu <James.Zhu@amd.com> +Acked-by: Leo Liu <leo.liu@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c +index d21c242..b8b2974 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c +@@ -780,8 +780,6 @@ static int vcn_v1_0_start_spg_mode(struct amdgpu_device *adev) + /* disable clock gating */ + vcn_v1_0_disable_clock_gating(adev); + +- vcn_v1_0_mc_resume_spg_mode(adev); +- + /* disable interupt */ + WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_MASTINT_EN), 0, + ~UVD_MASTINT_EN__VCPU_EN_MASK); +@@ -840,6 +838,8 @@ static int vcn_v1_0_start_spg_mode(struct amdgpu_device *adev) + (0x1 << UVD_MPC_SET_MUX__SET_1__SHIFT) | + (0x2 << UVD_MPC_SET_MUX__SET_2__SHIFT))); + ++ vcn_v1_0_mc_resume_spg_mode(adev); ++ + /* take all subblocks out of reset, except VCPU */ + WREG32_SOC15(UVD, 0, mmUVD_SOFT_RESET, + UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK); +-- +2.7.4 + |