diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/5499-drm-amd-display-Fix-Vega10-lightup-on-S3-resume.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/5499-drm-amd-display-Fix-Vega10-lightup-on-S3-resume.patch | 88 |
1 files changed, 88 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/5499-drm-amd-display-Fix-Vega10-lightup-on-S3-resume.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/5499-drm-amd-display-Fix-Vega10-lightup-on-S3-resume.patch new file mode 100644 index 00000000..c5641457 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/5499-drm-amd-display-Fix-Vega10-lightup-on-S3-resume.patch @@ -0,0 +1,88 @@ +From f559629353208259508efaad6fa36d1796383eeb Mon Sep 17 00:00:00 2001 +From: Roman Li <Roman.Li@amd.com> +Date: Wed, 19 Sep 2018 15:46:53 -0400 +Subject: [PATCH 5499/5725] drm/amd/display: Fix Vega10 lightup on S3 resume + +[Why] +There have been a few reports of Vega10 display remaining blank +after S3 resume. The regression is caused by workaround for mode +change on Vega10 - skip set_bandwidth if stream count is 0. +As a result we skipped dispclk reset on suspend, thus on resume +we may skip the clock update assuming it hasn't been changed. +On some systems it causes display blank or 'out of range'. + +[How] +Revert "drm/amd/display: Fix Vega10 black screen after mode change" +Verified that it hadn't cause mode change regression. + +Signed-off-by: Roman Li <Roman.Li@amd.com> +Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +Signed-off-by: Raveendra Talabattula <raveendra.talabattula@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 2 +- + drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h | 5 ----- + drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c | 12 ------------ + 3 files changed, 1 insertion(+), 18 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +index 2d7d13b..419d0e4 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +@@ -2534,7 +2534,7 @@ static void pplib_apply_display_requirements( + dc->prev_display_config = *pp_display_cfg; + } + +-void dce110_set_bandwidth( ++static void dce110_set_bandwidth( + struct dc *dc, + struct dc_state *context, + bool decrease_allowed) +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h +index a226a3d..d6db3db 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h +@@ -68,11 +68,6 @@ void dce110_fill_display_configs( + const struct dc_state *context, + struct dm_pp_display_configuration *pp_display_cfg); + +-void dce110_set_bandwidth( +- struct dc *dc, +- struct dc_state *context, +- bool decrease_allowed); +- + uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context); + + void dp_receiver_power_ctrl(struct dc_link *link, bool on); +diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c +index 5853522..eb0f5f9 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c +@@ -244,17 +244,6 @@ static void dce120_update_dchub( + dh_data->dchub_info_valid = false; + } + +-static void dce120_set_bandwidth( +- struct dc *dc, +- struct dc_state *context, +- bool decrease_allowed) +-{ +- if (context->stream_count <= 0) +- return; +- +- dce110_set_bandwidth(dc, context, decrease_allowed); +-} +- + void dce120_hw_sequencer_construct(struct dc *dc) + { + /* All registers used by dce11.2 match those in dce11 in offset and +@@ -263,6 +252,5 @@ void dce120_hw_sequencer_construct(struct dc *dc) + dce110_hw_sequencer_construct(dc); + dc->hwss.enable_display_power_gating = dce120_enable_display_power_gating; + dc->hwss.update_dchub = dce120_update_dchub; +- dc->hwss.set_bandwidth = dce120_set_bandwidth; + } + +-- +2.7.4 + |