diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/5342-drm-amd-display-Improve-spelling-grammar-and-formatt.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/5342-drm-amd-display-Improve-spelling-grammar-and-formatt.patch | 638 |
1 files changed, 638 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/5342-drm-amd-display-Improve-spelling-grammar-and-formatt.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/5342-drm-amd-display-Improve-spelling-grammar-and-formatt.patch new file mode 100644 index 00000000..b94da601 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/5342-drm-amd-display-Improve-spelling-grammar-and-formatt.patch @@ -0,0 +1,638 @@ +From fde7d81af7bcc798ba0843f31cf6b4915734d342 Mon Sep 17 00:00:00 2001 +From: David Francis <David.Francis@amd.com> +Date: Wed, 15 Aug 2018 14:38:30 -0400 +Subject: [PATCH 5342/5725] drm/amd/display: Improve spelling, grammar, and + formatting of amdgpu_dm.c comments + +[Why] +Good spelling and grammar makes comments +more pleasant and clearer. + +Linux has coding standards for comments +that we should try to follow. + +[How] +Fix obvious spelling and grammar issues + +Ensure all comments use '/*' and '*/' and multi-line comments +follow linux convention + +Remove line-of-stars comments that do not separate sections +of code and comments referring to lines of code that have +since been removed + +Change-Id: I31145072df4c79ab46649ee65a0d49c16733e4bd +Signed-off-by: David Francis <David.Francis@amd.com> +Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Raveendra Talabattula <raveendra.talabattula@amd.com> +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 216 ++++++++++++---------- + 1 file changed, 121 insertions(+), 95 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index 3815c7b..8eb935e 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -80,12 +80,7 @@ MODULE_FIRMWARE(FIRMWARE_RAVEN_DMCU); + static int amdgpu_dm_init(struct amdgpu_device *adev); + static void amdgpu_dm_fini(struct amdgpu_device *adev); + +-/* initializes drm_device display related structures, based on the information +- * provided by DAL. The drm strcutures are: drm_crtc, drm_connector, +- * drm_encoder, drm_mode_config +- * +- * Returns 0 on success +- */ ++ + static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev); + /* removes and deallocates the drm structures, created by the above function */ + static void amdgpu_dm_destroy_drm_device(struct amdgpu_display_manager *dm); +@@ -113,6 +108,12 @@ static int amdgpu_dm_atomic_commit(struct drm_device *dev, + struct drm_atomic_state *state, + bool nonblock); + ++static int amdgpu_dm_connector_get_modes(struct drm_connector *connector); ++ ++static int amdgpu_dm_atomic_commit(struct drm_device *dev, ++ struct drm_atomic_state *state, ++ bool nonblock); ++ + static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state); + + static int amdgpu_dm_atomic_check(struct drm_device *dev, +@@ -243,10 +244,6 @@ get_crtc_by_otg_inst(struct amdgpu_device *adev, + struct drm_crtc *crtc; + struct amdgpu_crtc *amdgpu_crtc; + +- /* +- * following if is check inherited from both functions where this one is +- * used now. Need to be checked why it could happen. +- */ + if (otg_inst == -1) { + WARN_ON(1); + return adev->mode_info.crtcs[0]; +@@ -272,7 +269,7 @@ static void dm_pflip_high_irq(void *interrupt_params) + amdgpu_crtc = get_crtc_by_otg_inst(adev, irq_params->irq_src - IRQ_TYPE_PFLIP); + + /* IRQ could occur when in initial stage */ +- /*TODO work and BO cleanup */ ++ /* TODO work and BO cleanup */ + if (amdgpu_crtc == NULL) { + DRM_DEBUG_DRIVER("CRTC is null, returning.\n"); + return; +@@ -290,9 +287,9 @@ static void dm_pflip_high_irq(void *interrupt_params) + return; + } + +- /* wakeup usersapce */ ++ /* wake up usersapce */ + if (amdgpu_crtc->event) { +- /* Update to correct count/ts if racing with vblank irq */ ++ /* Update to correct count(s) if racing with vblank irq */ + drm_accurate_vblank_count(&amdgpu_crtc->base); + + drm_crtc_send_vblank_event(&amdgpu_crtc->base, amdgpu_crtc->event); +@@ -391,8 +388,8 @@ static void amdgpu_dm_fbc_init(struct drm_connector *connector) + + } + +- +-/* Init display KMS ++/* ++ * Init display KMS + * + * Returns 0 on success + */ +@@ -1003,24 +1000,27 @@ amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector) + + sink = aconnector->dc_link->local_sink; + +- /* Edid mgmt connector gets first update only in mode_valid hook and then ++ /* ++ * Edid mgmt connector gets first update only in mode_valid hook and then + * the connector sink is set to either fake or physical sink depends on link status. +- * don't do it here if u are during boot ++ * Skip if already done during boot. + */ + if (aconnector->base.force != DRM_FORCE_UNSPECIFIED + && aconnector->dc_em_sink) { + +- /* For S3 resume with headless use eml_sink to fake stream +- * because on resume connecotr->sink is set ti NULL ++ /* ++ * For S3 resume with headless use eml_sink to fake stream ++ * because on resume connector->sink is set to NULL + */ + mutex_lock(&dev->mode_config.mutex); + + if (sink) { + if (aconnector->dc_sink) { + amdgpu_dm_update_freesync_caps(connector, NULL); +- /* retain and release bellow are used for +- * bump up refcount for sink because the link don't point +- * to it anymore after disconnect so on next crtc to connector ++ /* ++ * retain and release below are used to ++ * bump up refcount for sink because the link doesn't point ++ * to it anymore after disconnect, so on next crtc to connector + * reshuffle by UMD we will get into unwanted dc_sink release + */ + if (aconnector->dc_sink != aconnector->dc_em_sink) +@@ -1049,8 +1049,10 @@ amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector) + return; + + if (aconnector->dc_sink == sink) { +- /* We got a DP short pulse (Link Loss, DP CTS, etc...). +- * Do nothing!! */ ++ /* ++ * We got a DP short pulse (Link Loss, DP CTS, etc...). ++ * Do nothing!! ++ */ + DRM_DEBUG_DRIVER("DCHPD: connector_id=%d: dc_sink didn't change.\n", + aconnector->connector_id); + return; +@@ -1061,11 +1063,15 @@ amdgpu_dm_update_connector_after_detect(struct amdgpu_dm_connector *aconnector) + + mutex_lock(&dev->mode_config.mutex); + +- /* 1. Update status of the drm connector +- * 2. Send an event and let userspace tell us what to do */ ++ /* ++ * 1. Update status of the drm connector ++ * 2. Send an event and let userspace tell us what to do ++ */ + if (sink) { +- /* TODO: check if we still need the S3 mode update workaround. +- * If yes, put it here. */ ++ /* ++ * TODO: check if we still need the S3 mode update workaround. ++ * If yes, put it here. ++ */ + if (aconnector->dc_sink) + amdgpu_dm_update_freesync_caps(connector, NULL); + +@@ -1100,7 +1106,8 @@ static void handle_hpd_irq(void *param) + struct drm_device *dev = connector->dev; + enum dc_connection_type new_connection_type = dc_connection_none; + +- /* In case of failure or MST no need to update connector status or notify the OS ++ /* ++ * In case of failure or MST no need to update connector status or notify the OS + * since (for MST case) MST does this in it's own context. + */ + mutex_lock(&aconnector->hpd_lock); +@@ -1198,7 +1205,7 @@ static void dm_handle_hpd_rx_irq(struct amdgpu_dm_connector *aconnector) + break; + } + +- /* check if there is new irq to be handle */ ++ /* check if there is new irq to be handled */ + dret = drm_dp_dpcd_read( + &aconnector->dm_dp_aux.aux, + dpcd_addr, +@@ -1224,7 +1231,8 @@ static void handle_hpd_rx_irq(void *param) + bool is_mst_root_connector = aconnector->mst_mgr.mst_state; + enum dc_connection_type new_connection_type = dc_connection_none; + +- /* TODO:Temporary add mutex to protect hpd interrupt not have a gpio ++ /* ++ * TODO:Temporary add mutex to protect hpd interrupt not have a gpio + * conflict, after implement i2c helper, this mutex should be + * retired. + */ +@@ -1332,7 +1340,8 @@ static int dce110_register_irq_handlers(struct amdgpu_device *adev) + int_params.requested_polarity = INTERRUPT_POLARITY_DEFAULT; + int_params.current_polarity = INTERRUPT_POLARITY_DEFAULT; + +- /* Actions of amdgpu_irq_add_id(): ++ /* ++ * Actions of amdgpu_irq_add_id(): + * 1. Register a set() function with base driver. + * Base driver will call set() function to enable/disable an + * interrupt in DC hardware. +@@ -1412,7 +1421,8 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev) + int_params.requested_polarity = INTERRUPT_POLARITY_DEFAULT; + int_params.current_polarity = INTERRUPT_POLARITY_DEFAULT; + +- /* Actions of amdgpu_irq_add_id(): ++ /* ++ * Actions of amdgpu_irq_add_id(): + * 1. Register a set() function with base driver. + * Base driver will call set() function to enable/disable an + * interrupt in DC hardware. +@@ -1421,7 +1431,7 @@ static int dcn10_register_irq_handlers(struct amdgpu_device *adev) + * coming from DC hardware. + * amdgpu_dm_irq_handler() will re-direct the interrupt to DC + * for acknowledging and handling. +- * */ ++ */ + + /* Use VSTARTUP interrupt */ + for (i = DCN_1_0__SRCID__DC_D1_OTG_VSTARTUP; +@@ -1499,7 +1509,7 @@ static int amdgpu_dm_mode_config_init(struct amdgpu_device *adev) + + adev->ddev->mode_config.preferred_depth = 24; + adev->ddev->mode_config.prefer_shadow = 1; +- /* indicate support of immediate flip */ ++ /* indicates support for immediate flip */ + adev->ddev->mode_config.async_page_flip = true; + + adev->ddev->mode_config.fb_base = adev->gmc.aper_base; +@@ -1585,7 +1595,7 @@ static int initialize_plane(struct amdgpu_display_manager *dm, + plane->base.type = mode_info->plane_type[plane_id]; + + /* +- * HACK: IGT tests expect that each plane can only have one ++ * HACK: IGT tests expect that each plane can only have + * one possible CRTC. For now, set one CRTC for each + * plane that is not an underlay, but still allow multiple + * CRTCs for underlay planes. +@@ -1613,10 +1623,11 @@ static void register_backlight_device(struct amdgpu_display_manager *dm, + + if ((link->connector_signal & (SIGNAL_TYPE_EDP | SIGNAL_TYPE_LVDS)) && + link->type != dc_connection_none) { +- /* Event if registration failed, we should continue with +- * DM initialization because not having a backlight control +- * is better then a black screen. +- */ ++ /* ++ * Event if registration failed, we should continue with ++ * DM initialization because not having a backlight control ++ * is better then a black screen. ++ */ + amdgpu_dm_register_backlight_device(dm); + + if (dm->backlight_dev) +@@ -1626,7 +1637,8 @@ static void register_backlight_device(struct amdgpu_display_manager *dm, + } + + +-/* In this architecture, the association ++/* ++ * In this architecture, the association + * connector -> encoder -> crtc + * id not really requried. The crtc and connector will hold the + * display_index as an abstraction to use with DAL component +@@ -1782,7 +1794,7 @@ static void amdgpu_dm_destroy_drm_device(struct amdgpu_display_manager *dm) + * amdgpu_display_funcs functions + *****************************************************************************/ + +-/** ++/* + * dm_bandwidth_update - program display watermarks + * + * @adev: amdgpu_device pointer +@@ -2013,9 +2025,11 @@ static int dm_early_init(void *handle) + if (adev->mode_info.funcs == NULL) + adev->mode_info.funcs = &dm_display_funcs; + +- /* Note: Do NOT change adev->audio_endpt_rreg and ++ /* ++ * Note: Do NOT change adev->audio_endpt_rreg and + * adev->audio_endpt_wreg because they are initialised in +- * amdgpu_device_init() */ ++ * amdgpu_device_init() ++ */ + #if defined(CONFIG_DEBUG_KERNEL_DC) + device_create_file( + adev->ddev->dev, +@@ -2061,7 +2075,7 @@ static bool fill_rects_from_plane_state(const struct drm_plane_state *state, + { + plane_state->src_rect.x = state->src_x >> 16; + plane_state->src_rect.y = state->src_y >> 16; +- /*we ignore for now mantissa and do not to deal with floating pixels :(*/ ++ /* we ignore the mantissa for now and do not deal with floating pixels :( */ + plane_state->src_rect.width = state->src_w >> 16; + + if (plane_state->src_rect.width == 0) +@@ -2113,7 +2127,7 @@ static int get_fb_info(const struct amdgpu_framebuffer *amdgpu_fb, + int r = amdgpu_bo_reserve(rbo, false); + + if (unlikely(r)) { +- // Don't show error msg. when return -ERESTARTSYS ++ /* Don't show error message when returning -ERESTARTSYS */ + if (r != -ERESTARTSYS) + DRM_ERROR("Unable to reserve buffer: %d\n", r); + return r; +@@ -2311,8 +2325,6 @@ static int fill_plane_attributes(struct amdgpu_device *adev, + return ret; + } + +-/*****************************************************************************/ +- + static void update_stream_scaling_settings(const struct drm_display_mode *mode, + const struct dm_connector_state *dm_state, + struct dc_stream_state *stream) +@@ -2375,7 +2387,8 @@ convert_color_depth_from_display_info(const struct drm_connector *connector) + + switch (bpc) { + case 0: +- /* Temporary Work around, DRM don't parse color depth for ++ /* ++ * Temporary Work around, DRM doesn't parse color depth for + * EDID revision before 1.4 + * TODO: Fix edid parsing + */ +@@ -2488,8 +2501,6 @@ static void adjust_colour_depth_from_display_info(struct dc_crtc_timing *timing_ + + } + +-/*****************************************************************************/ +- + static int + get_norm_pix_clk(const struct dc_crtc_timing *timing) + { +@@ -2804,10 +2815,11 @@ static void dm_enable_per_frame_crtc_master_sync(struct dc_state *context) + for (i = 0; i < context->stream_count ; i++) { + if (!context->streams[i]) + continue; +- /* TODO: add a function to read AMD VSDB bits and will set +- * crtc_sync_master.multi_sync_enabled flag +- * For now its set to false +- */ ++ /* ++ *TODO: add a function to read AMD VSDB bits and will set ++ * crtc_sync_master.multi_sync_enabled flag ++ * For now it's set to false ++ */ + set_multisync_trigger_params(context->streams[i]); + } + set_master_stream(context, context->streams, context->stream_count); +@@ -2869,7 +2881,8 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector, + head); + + if (preferred_mode == NULL) { +- /* This may not be an error, the use case is when we we have no ++ /* ++ * This may not be an error, the use case is when we have no + * usermode calls to reset and set mode upon hotplug. In this + * case, we call set mode ourselves to restore the previous mode + * and the modelist may not be filled in in time. +@@ -3011,10 +3024,12 @@ amdgpu_dm_connector_detect(struct drm_connector *connector, bool force) + bool connected; + struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector); + +- /* Notes: ++ /* ++ * Notes: + * 1. This interface is NOT called in context of HPD irq. + * 2. This interface *is called* in context of user-mode ioctl. Which +- * makes it a bad place for *any* MST-related activit. */ ++ * makes it a bad place for *any* MST-related activity. ++ */ + + if (aconnector->base.force == DRM_FORCE_UNSPECIFIED && + !aconnector->fake_enable) +@@ -3270,7 +3285,8 @@ static void handle_edid_mgmt(struct amdgpu_dm_connector *aconnector) + { + struct dc_link *link = (struct dc_link *)aconnector->dc_link; + +- /* In case of headless boot with force on for DP managed connector ++ /* ++ * In case of headless boot with force on for DP managed connector + * Those settings have to be != 0 to get initial modeset + */ + if (link->connector_signal == SIGNAL_TYPE_DISPLAY_PORT) { +@@ -3298,7 +3314,8 @@ enum drm_mode_status amdgpu_dm_connector_mode_valid(struct drm_connector *connec + (mode->flags & DRM_MODE_FLAG_DBLSCAN)) + return result; + +- /* Only run this the first time mode_valid is called to initilialize ++ /* ++ * Only run this the first time mode_valid is called to initilialize + * EDID mgmt + */ + if (aconnector->base.force != DRM_FORCE_UNSPECIFIED && +@@ -3339,9 +3356,9 @@ enum drm_mode_status amdgpu_dm_connector_mode_valid(struct drm_connector *connec + static const struct drm_connector_helper_funcs + amdgpu_dm_connector_helper_funcs = { + /* +- * If hotplug a second bigger display in FB Con mode, bigger resolution ++ * If hotplugging a second bigger display in FB Con mode, bigger resolution + * modes will be filtered by drm_mode_validate_size(), and those modes +- * is missing after user start lightdm. So we need to renew modes list. ++ * are missing after user start lightdm. So we need to renew modes list. + * in get_modes call back, not just return the modes count + */ + .get_modes = get_modes, +@@ -3367,7 +3384,7 @@ static int dm_crtc_helper_atomic_check(struct drm_crtc *crtc, + return ret; + } + +- /* In some use cases, like reset, no stream is attached */ ++ /* In some use cases, like reset, no stream is attached */ + if (!dm_crtc_state->stream) + return 0; + +@@ -3588,7 +3605,7 @@ static const struct drm_plane_helper_funcs dm_plane_helper_funcs = { + * TODO: these are currently initialized to rgb formats only. + * For future use cases we should either initialize them dynamically based on + * plane capabilities, or initialize this array to all formats, so internal drm +- * check will succeed, and let DC to implement proper check ++ * check will succeed, and let DC implement proper check + */ + static const uint32_t rgb_formats[] = { + DRM_FORMAT_RGB888, +@@ -3916,7 +3933,8 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm, + aconnector->hpd.hpd = AMDGPU_HPD_NONE; /* not used */ + mutex_init(&aconnector->hpd_lock); + +- /* configure support HPD hot plug connector_>polled default value is 0 ++ /* ++ * configure support HPD hot plug connector_>polled default value is 0 + * which means HPD hot plug not supported + */ + switch (connector_type) { +@@ -4029,7 +4047,8 @@ create_i2c(struct ddc_service *ddc_service, + } + + +-/* Note: this function assumes that dc_link_detect() was called for the ++/* ++ * Note: this function assumes that dc_link_detect() was called for the + * dc_link which will be represented by this aconnector. + */ + static int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm, +@@ -4360,7 +4379,8 @@ static void amdgpu_dm_do_flip(struct drm_crtc *crtc, + target_vblank = target - drm_crtc_vblank_count(crtc) + + amdgpu_get_vblank_counter_kms(crtc->dev, acrtc->crtc_id); + +- /* TODO This might fail and hence better not used, wait ++ /* ++ * TODO This might fail and hence better not used, wait + * explicitly on fences instead + * and in general should be called for + * blocking commit to as per framework helpers +@@ -4377,7 +4397,8 @@ static void amdgpu_dm_do_flip(struct drm_crtc *crtc, + + amdgpu_bo_unreserve(abo); + +- /* Wait until we're out of the vertical blank period before the one ++ /* ++ * Wait until we're out of the vertical blank period before the one + * targeted by the flip + */ + while ((acrtc->enabled && +@@ -4631,7 +4652,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, + } + } + +-/** ++/* + * amdgpu_dm_crtc_copy_transient_flags - copy mirrored flags from DRM to DC + * @crtc_state: the DRM CRTC state + * @stream_state: the DC stream state. +@@ -4668,8 +4689,10 @@ static int amdgpu_dm_atomic_commit(struct drm_device *dev, + if (drm_atomic_crtc_needs_modeset(new_crtc_state) && dm_old_crtc_state->stream) + manage_dm_interrupts(adev, acrtc, false); + } +- /* Add check here for SoC's that support hardware cursor plane, to +- * unset legacy_cursor_update */ ++ /* ++ * Add check here for SoC's that support hardware cursor plane, to ++ * unset legacy_cursor_update ++ */ + + return drm_atomic_helper_commit(dev, state, nonblock); + +@@ -4736,8 +4759,8 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) + * this could happen because of issues with + * userspace notifications delivery. + * In this case userspace tries to set mode on +- * display which is disconnect in fact. +- * dc_sink in NULL in this case on aconnector. ++ * display which is disconnected in fact. ++ * dc_sink is NULL in this case on aconnector. + * We expect reset mode will come soon. + * + * This can also happen when unplug is done +@@ -4806,7 +4829,7 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) + if (!acrtc || drm_atomic_crtc_needs_modeset(new_crtc_state)) + continue; + +- /* Skip any thing not scale or underscan changes */ ++ /* Skip anything that is not scaling or underscan changes */ + if (!is_scaling_state_different(dm_new_con_state, dm_old_con_state)) + continue; + +@@ -4890,10 +4913,11 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) + + drm_atomic_helper_cleanup_planes(dev, state); + +- /* Finally, drop a runtime PM reference for each newly disabled CRTC, +- * so we can put the GPU into runtime suspend if we're not driving any +- * displays anymore +- */ ++ /* ++ * Finally, drop a runtime PM reference for each newly disabled CRTC, ++ * so we can put the GPU into runtime suspend if we're not driving any ++ * displays anymore ++ */ + for (i = 0; i < crtc_disable_count; i++) + pm_runtime_put_autosuspend(dev->dev); + pm_runtime_mark_last_busy(dev->dev); +@@ -4958,9 +4982,9 @@ static int dm_force_atomic_commit(struct drm_connector *connector) + } + + /* +- * This functions handle all cases when set mode does not come upon hotplug. +- * This include when the same display is unplugged then plugged back into the +- * same port and when we are running without usermode desktop manager supprot ++ * This function handles all cases when set mode does not come upon hotplug. ++ * This includes when a display is unplugged then plugged back into the ++ * same port and when running without usermode desktop manager supprot + */ + void dm_restore_drm_connector_state(struct drm_device *dev, + struct drm_connector *connector) +@@ -4989,7 +5013,7 @@ void dm_restore_drm_connector_state(struct drm_device *dev, + dm_force_atomic_commit(&aconnector->base); + } + +-/*` ++/* + * Grabs all modesetting locks to serialize against any blocking commits, + * Waits for completion of all non blocking commits. + */ +@@ -5000,7 +5024,8 @@ static int do_aquire_global_lock(struct drm_device *dev, + struct drm_crtc_commit *commit; + long ret; + +- /* Adding all modeset locks to aquire_ctx will ++ /* ++ * Adding all modeset locks to aquire_ctx will + * ensure that when the framework release it the + * extra locks we are locking here will get released to + */ +@@ -5019,7 +5044,8 @@ static int do_aquire_global_lock(struct drm_device *dev, + if (!commit) + continue; + +- /* Make sure all pending HW programming completed and ++ /* ++ * Make sure all pending HW programming completed and + * page flips done + */ + ret = wait_for_completion_interruptible_timeout(&commit->hw_done, 10*HZ); +@@ -5113,7 +5139,7 @@ static int dm_update_crtcs_state(struct amdgpu_display_manager *dm, + + /* TODO This hack should go away */ + if (aconnector && enable) { +- // Make sure fake sink is created in plug-in scenario ++ /* Make sure fake sink is created in plug-in scenario */ + drm_new_conn_state = drm_atomic_get_new_connector_state(state, + &aconnector->base); + +@@ -5134,9 +5160,9 @@ static int dm_update_crtcs_state(struct amdgpu_display_manager *dm, + + /* + * we can have no stream on ACTION_SET if a display +- * was disconnected during S3, in this case it not and ++ * was disconnected during S3, in this case it is not an + * error, the OS will be updated after detection, and +- * do the right thing on next atomic commit ++ * will do the right thing on next atomic commit + */ + + if (!new_stream) { +@@ -5493,7 +5519,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, + goto fail; + + /* Check scaling and underscan changes*/ +- /*TODO Removed scaling changes validation due to inability to commit ++ /* TODO Removed scaling changes validation due to inability to commit + * new stream into context w\o causing full reset. Need to + * decide how to handle. + */ +@@ -5516,7 +5542,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, + + /* + * For full updates case when +- * removing/adding/updating streams on once CRTC while flipping ++ * removing/adding/updating streams on once CRTC while flipping + * on another CRTC, + * acquiring global lock will guarantee that any such full + * update commit +@@ -5626,12 +5652,12 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, + (edid->version == 1 && edid->revision > 1))) { + for (i = 0; i < 4; i++) { + +- timing = &edid->detailed_timings[i]; +- data = &timing->data.other_data; +- range = &data->data.range; +- /* +- * Check if monitor has continuous frequency mode +- */ ++ timing = &edid->detailed_timings[i]; ++ data = &timing->data.other_data; ++ range = &data->data.range; ++ /* ++ * Check if monitor has continuous frequency mode ++ */ + if (data->type != EDID_DETAIL_MONITOR_RANGE) + continue; + /* +-- +2.7.4 + |