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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/5217-drm-amdgpu-Remove-duplicate-code-in-gfx_v8_0.c.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/5217-drm-amdgpu-Remove-duplicate-code-in-gfx_v8_0.c.patch161
1 files changed, 161 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/5217-drm-amdgpu-Remove-duplicate-code-in-gfx_v8_0.c.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/5217-drm-amdgpu-Remove-duplicate-code-in-gfx_v8_0.c.patch
new file mode 100644
index 00000000..dbc014c2
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/5217-drm-amdgpu-Remove-duplicate-code-in-gfx_v8_0.c.patch
@@ -0,0 +1,161 @@
+From 91820f3765ee67568d2752f3f2aae7e818fac4be Mon Sep 17 00:00:00 2001
+From: Rex Zhu <Rex.Zhu@amd.com>
+Date: Fri, 17 Aug 2018 13:13:12 +0800
+Subject: [PATCH 5217/5725] drm/amdgpu: Remove duplicate code in gfx_v8_0.c
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+There are no any logical changes here.
+
+1. if kcq can be enabled via kiq, we don't need to
+ do kiq ring test.
+2. amdgpu_ring_test_ring function can be used to
+ sync the ring complete, remove the duplicate code.
+
+v2: alloc 6 (not 7) dws for unmap_queues
+
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Acked-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 80 ++++++-----------------------------
+ 1 file changed, 13 insertions(+), 67 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+index be2cd71..275d524 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+@@ -4603,7 +4603,6 @@ static void gfx_v8_0_kiq_setting(struct amdgpu_ring *ring)
+ static int gfx_v8_0_kiq_kcq_enable(struct amdgpu_device *adev)
+ {
+ struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring;
+- uint32_t scratch, tmp = 0;
+ uint64_t queue_mask = 0;
+ int r, i;
+
+@@ -4622,17 +4621,10 @@ static int gfx_v8_0_kiq_kcq_enable(struct amdgpu_device *adev)
+ queue_mask |= (1ull << i);
+ }
+
+- r = amdgpu_gfx_scratch_get(adev, &scratch);
+- if (r) {
+- DRM_ERROR("Failed to get scratch reg (%d).\n", r);
+- return r;
+- }
+- WREG32(scratch, 0xCAFEDEAD);
+-
+- r = amdgpu_ring_alloc(kiq_ring, (8 * adev->gfx.num_compute_rings) + 11);
++ kiq_ring->ready = true;
++ r = amdgpu_ring_alloc(kiq_ring, (8 * adev->gfx.num_compute_rings) + 8);
+ if (r) {
+ DRM_ERROR("Failed to lock KIQ (%d).\n", r);
+- amdgpu_gfx_scratch_free(adev, scratch);
+ return r;
+ }
+ /* set resources */
+@@ -4664,25 +4656,12 @@ static int gfx_v8_0_kiq_kcq_enable(struct amdgpu_device *adev)
+ amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));
+ amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));
+ }
+- /* write to scratch for completion */
+- amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));
+- amdgpu_ring_write(kiq_ring, (scratch - PACKET3_SET_UCONFIG_REG_START));
+- amdgpu_ring_write(kiq_ring, 0xDEADBEEF);
+- amdgpu_ring_commit(kiq_ring);
+
+- for (i = 0; i < adev->usec_timeout; i++) {
+- tmp = RREG32(scratch);
+- if (tmp == 0xDEADBEEF)
+- break;
+- DRM_UDELAY(1);
+- }
+- if (i >= adev->usec_timeout) {
+- DRM_ERROR("KCQ enable failed (scratch(0x%04X)=0x%08X)\n",
+- scratch, tmp);
+- r = -EINVAL;
++ r = amdgpu_ring_test_ring(kiq_ring);
++ if (r) {
++ DRM_ERROR("KCQ enable failed\n");
++ kiq_ring->ready = false;
+ }
+- amdgpu_gfx_scratch_free(adev, scratch);
+-
+ return r;
+ }
+
+@@ -5013,15 +4992,6 @@ static int gfx_v8_0_kiq_resume(struct amdgpu_device *adev)
+ if (r)
+ goto done;
+
+- /* Test KIQ */
+- ring = &adev->gfx.kiq.ring;
+- ring->ready = true;
+- r = amdgpu_ring_test_ring(ring);
+- if (r) {
+- ring->ready = false;
+- goto done;
+- }
+-
+ /* Test KCQs */
+ for (i = 0; i < adev->gfx.num_compute_rings; i++) {
+ ring = &adev->gfx.compute_ring[i];
+@@ -5091,23 +5061,11 @@ static int gfx_v8_0_hw_init(void *handle)
+
+ static int gfx_v8_0_kcq_disable(struct amdgpu_ring *kiq_ring,struct amdgpu_ring *ring)
+ {
+- struct amdgpu_device *adev = kiq_ring->adev;
+- uint32_t scratch, tmp = 0;
+- int r, i;
+-
+- r = amdgpu_gfx_scratch_get(adev, &scratch);
+- if (r) {
+- DRM_ERROR("Failed to get scratch reg (%d).\n", r);
+- return r;
+- }
+- WREG32(scratch, 0xCAFEDEAD);
++ int r;
+
+- r = amdgpu_ring_alloc(kiq_ring, 10);
+- if (r) {
++ r = amdgpu_ring_alloc(kiq_ring, 6);
++ if (r)
+ DRM_ERROR("Failed to lock KIQ (%d).\n", r);
+- amdgpu_gfx_scratch_free(adev, scratch);
+- return r;
+- }
+
+ /* unmap queues */
+ amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));
+@@ -5120,23 +5078,11 @@ static int gfx_v8_0_kcq_disable(struct amdgpu_ring *kiq_ring,struct amdgpu_ring
+ amdgpu_ring_write(kiq_ring, 0);
+ amdgpu_ring_write(kiq_ring, 0);
+ amdgpu_ring_write(kiq_ring, 0);
+- /* write to scratch for completion */
+- amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));
+- amdgpu_ring_write(kiq_ring, (scratch - PACKET3_SET_UCONFIG_REG_START));
+- amdgpu_ring_write(kiq_ring, 0xDEADBEEF);
+- amdgpu_ring_commit(kiq_ring);
+
+- for (i = 0; i < adev->usec_timeout; i++) {
+- tmp = RREG32(scratch);
+- if (tmp == 0xDEADBEEF)
+- break;
+- DRM_UDELAY(1);
+- }
+- if (i >= adev->usec_timeout) {
+- DRM_ERROR("KCQ disabled failed (scratch(0x%04X)=0x%08X)\n", scratch, tmp);
+- r = -EINVAL;
+- }
+- amdgpu_gfx_scratch_free(adev, scratch);
++ r = amdgpu_ring_test_ring(kiq_ring);
++ if (r)
++ DRM_ERROR("KCQ disable failed\n");
++
+ return r;
+ }
+
+--
+2.7.4
+