diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/5011-drm-amdgpu-patch-the-IBs-for-the-second-UVD-instance.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/5011-drm-amdgpu-patch-the-IBs-for-the-second-UVD-instance.patch | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/5011-drm-amdgpu-patch-the-IBs-for-the-second-UVD-instance.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/5011-drm-amdgpu-patch-the-IBs-for-the-second-UVD-instance.patch new file mode 100644 index 00000000..01b073f6 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/5011-drm-amdgpu-patch-the-IBs-for-the-second-UVD-instance.patch @@ -0,0 +1,73 @@ +From 3c693286dae83108ad010eb69e344226d547d2e7 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Wed, 18 Jul 2018 14:52:42 +0200 +Subject: [PATCH 5011/5725] drm/amdgpu: patch the IBs for the second UVD + instance v2 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Patch the IBs for the second UVD instance so that userspace don't need +to care about the instance they submit to. + +v2: use direct IB patching + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-and-tested-by: James Zhu <James.Zhu@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Raveendra Talabattula <raveendra.talabattula@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 29 +++++++++++++++++++++++++++++ + 1 file changed, 29 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c +index 1fd09d0..87d6a59 100644 +--- a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c +@@ -1227,6 +1227,34 @@ static int uvd_v7_0_ring_test_ring(struct amdgpu_ring *ring) + } + + /** ++ * uvd_v7_0_ring_patch_cs_in_place - Patch the IB for command submission. ++ * ++ * @p: the CS parser with the IBs ++ * @ib_idx: which IB to patch ++ * ++ */ ++static int uvd_v7_0_ring_patch_cs_in_place(struct amdgpu_cs_parser *p, ++ uint32_t ib_idx) ++{ ++ struct amdgpu_ib *ib = &p->job->ibs[ib_idx]; ++ unsigned i; ++ ++ /* No patching necessary for the first instance */ ++ if (!p->ring->me) ++ return 0; ++ ++ for (i = 0; i < ib->length_dw; i += 2) { ++ uint32_t reg = amdgpu_get_ib_value(p, ib_idx, i); ++ ++ reg -= p->adev->reg_offset[UVD_HWIP][0][1]; ++ reg += p->adev->reg_offset[UVD_HWIP][1][1]; ++ ++ amdgpu_set_ib_value(p, ib_idx, i, reg); ++ } ++ return 0; ++} ++ ++/** + * uvd_v7_0_ring_emit_ib - execute indirect buffer + * + * @ring: amdgpu_ring pointer +@@ -1718,6 +1746,7 @@ static const struct amdgpu_ring_funcs uvd_v7_0_ring_vm_funcs = { + .get_rptr = uvd_v7_0_ring_get_rptr, + .get_wptr = uvd_v7_0_ring_get_wptr, + .set_wptr = uvd_v7_0_ring_set_wptr, ++ .patch_cs_in_place = uvd_v7_0_ring_patch_cs_in_place, + .emit_frame_size = + 2 + /* uvd_v7_0_ring_emit_hdp_flush */ + 2 + /* uvd_v7_0_ring_emit_hdp_invalidate */ +-- +2.7.4 + |