diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/5010-drm-amdgpu-add-support-for-inplace-IB-patching-for-M.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/5010-drm-amdgpu-add-support-for-inplace-IB-patching-for-M.patch | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/5010-drm-amdgpu-add-support-for-inplace-IB-patching-for-M.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/5010-drm-amdgpu-add-support-for-inplace-IB-patching-for-M.patch new file mode 100644 index 00000000..f0bdf355 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/5010-drm-amdgpu-add-support-for-inplace-IB-patching-for-M.patch @@ -0,0 +1,89 @@ +From 1d55956489a2094bd1295cb6125811d9ff5f8ee8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Mon, 23 Jul 2018 16:01:39 +0200 +Subject: [PATCH 5010/5725] drm/amdgpu: add support for inplace IB patching for + MM engines v2 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +We are going to need that for the second UVD instance on Vega20. + +v2: rename to patch_cs_in_place + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-and-tested-by: James Zhu <James.Zhu@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + + drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 22 +++++++++++++++------- + drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 + + 3 files changed, 17 insertions(+), 7 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index cbe4336..557c964 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -1814,6 +1814,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring) + #define amdgpu_vm_write_pte(adev, ib, pe, value, count, incr) ((adev)->vm_manager.vm_pte_funcs->write_pte((ib), (pe), (value), (count), (incr))) + #define amdgpu_vm_set_pte_pde(adev, ib, pe, addr, count, incr, flags) ((adev)->vm_manager.vm_pte_funcs->set_pte_pde((ib), (pe), (addr), (count), (incr), (flags))) + #define amdgpu_ring_parse_cs(r, p, ib) ((r)->funcs->parse_cs((p), (ib))) ++#define amdgpu_ring_patch_cs_in_place(r, p, ib) ((r)->funcs->patch_cs_in_place((p), (ib))) + #define amdgpu_ring_test_ring(r) (r)->funcs->test_ring((r)) + #define amdgpu_ring_test_ib(r, t) (r)->funcs->test_ib((r), (t)) + #define amdgpu_ring_get_rptr(r) (r)->funcs->get_rptr((r)) +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +index 15fa375..653c61f 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +@@ -918,7 +918,7 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev, + int r; + + /* Only for UVD/VCE VM emulation */ +- if (p->ring->funcs->parse_cs) { ++ if (p->ring->funcs->parse_cs || p->ring->funcs->patch_cs_in_place) { + unsigned i, j; + + for (i = 0, j = 0; i < p->nchunks && j < p->job->num_ibs; i++) { +@@ -959,12 +959,20 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev, + offset = m->start * AMDGPU_GPU_PAGE_SIZE; + kptr += va_start - offset; + +- memcpy(ib->ptr, kptr, chunk_ib->ib_bytes); +- amdgpu_bo_kunmap(aobj); +- +- r = amdgpu_ring_parse_cs(ring, p, j); +- if (r) +- return r; ++ if (p->ring->funcs->parse_cs) { ++ memcpy(ib->ptr, kptr, chunk_ib->ib_bytes); ++ amdgpu_bo_kunmap(aobj); ++ ++ r = amdgpu_ring_parse_cs(ring, p, j); ++ if (r) ++ return r; ++ } else { ++ ib->ptr = (uint32_t *)kptr; ++ r = amdgpu_ring_patch_cs_in_place(ring, p, j); ++ amdgpu_bo_kunmap(aobj); ++ if (r) ++ return r; ++ } + + j++; + } +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +index 380eb2c..7bec0be 100755 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +@@ -122,6 +122,7 @@ struct amdgpu_ring_funcs { + void (*set_wptr)(struct amdgpu_ring *ring); + /* validating and patching of IBs */ + int (*parse_cs)(struct amdgpu_cs_parser *p, uint32_t ib_idx); ++ int (*patch_cs_in_place)(struct amdgpu_cs_parser *p, uint32_t ib_idx); + /* constants to calculate how many DW are needed for an emit */ + unsigned emit_frame_size; + unsigned emit_ib_size; +-- +2.7.4 + |