diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4992-drm-amdgpu-Fix-RLC-safe-mode-test-in-gfx_v9_0_enter_.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4992-drm-amdgpu-Fix-RLC-safe-mode-test-in-gfx_v9_0_enter_.patch | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4992-drm-amdgpu-Fix-RLC-safe-mode-test-in-gfx_v9_0_enter_.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4992-drm-amdgpu-Fix-RLC-safe-mode-test-in-gfx_v9_0_enter_.patch new file mode 100644 index 00000000..1d3d3649 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4992-drm-amdgpu-Fix-RLC-safe-mode-test-in-gfx_v9_0_enter_.patch @@ -0,0 +1,42 @@ +From 0e3792809c47d3d8c416045fd11546d3449d1650 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Michel=20D=C3=A4nzer?= <michel.daenzer@amd.com> +Date: Thu, 19 Jul 2018 18:33:39 +0200 +Subject: [PATCH 4992/5725] drm/amdgpu: Fix RLC safe mode test in + gfx_v9_0_enter_rlc_safe_mode +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +We were testing the register offset, instead of the value stored in the +register, therefore always timing out the loop. + +This reduces suspend time of the system in the bug report below by ~600 +ms. + +Cc: stable@vger.kernel.org +Bugzilla: https://bugs.freedesktop.org/107277 +Tested-by: Paul Menzel <pmenzel@molgen.mpg.de> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> +Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index 39b229e..670a564 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -3495,7 +3495,7 @@ static void gfx_v9_0_enter_rlc_safe_mode(struct amdgpu_device *adev) + + /* wait for RLC_SAFE_MODE */ + for (i = 0; i < adev->usec_timeout; i++) { +- if (!REG_GET_FIELD(SOC15_REG_OFFSET(GC, 0, mmRLC_SAFE_MODE), RLC_SAFE_MODE, CMD)) ++ if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, mmRLC_SAFE_MODE), RLC_SAFE_MODE, CMD)) + break; + udelay(1); + } +-- +2.7.4 + |