diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4911-drm-amd-display-read-DP-sink-and-DP-branch-hardware-.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4911-drm-amd-display-read-DP-sink-and-DP-branch-hardware-.patch | 104 |
1 files changed, 104 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4911-drm-amd-display-read-DP-sink-and-DP-branch-hardware-.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4911-drm-amd-display-read-DP-sink-and-DP-branch-hardware-.patch new file mode 100644 index 00000000..03c0bfec --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4911-drm-amd-display-read-DP-sink-and-DP-branch-hardware-.patch @@ -0,0 +1,104 @@ +From 8f2acb22d5fc4c2bbb5c32e8829ac3a3ce6a8041 Mon Sep 17 00:00:00 2001 +From: Alvin lee <alvin.lee3@amd.com> +Date: Tue, 19 Jun 2018 15:40:09 -0400 +Subject: [PATCH 4911/5725] drm/amd/display: read DP sink and DP branch + hardware and firmware revision from DPCD + +- define new dpcd address in drm +- implement new members in dpcd_caps to store values read from new dpcd address + +Signed-off-by: Alvin lee <alvin.lee3@amd.com> +Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 25 ++++++++++++++++++++++++ + drivers/gpu/drm/amd/display/dc/dc.h | 5 +++++ + drivers/gpu/drm/amd/display/include/dpcd_defs.h | 3 +++ + 3 files changed, 33 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +index 68c1f65..165618f 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +@@ -2260,6 +2260,11 @@ static void get_active_converter_info( + + link->dpcd_caps.branch_hw_revision = + dp_hw_fw_revision.ieee_hw_rev; ++ ++ memmove( ++ link->dpcd_caps.branch_fw_revision, ++ dp_hw_fw_revision.ieee_fw_rev, ++ sizeof(dp_hw_fw_revision.ieee_fw_rev)); + } + } + +@@ -2315,6 +2320,7 @@ static bool retrieve_link_cap(struct dc_link *link) + enum dc_status status = DC_ERROR_UNEXPECTED; + uint32_t read_dpcd_retry_cnt = 3; + int i; ++ struct dp_sink_hw_fw_revision dp_hw_fw_revision; + + memset(dpcd_data, '\0', sizeof(dpcd_data)); + memset(&down_strm_port_count, +@@ -2409,6 +2415,25 @@ static bool retrieve_link_cap(struct dc_link *link) + (sink_id.ieee_oui[1] << 8) + + (sink_id.ieee_oui[2]); + ++ memmove( ++ link->dpcd_caps.sink_dev_id_str, ++ sink_id.ieee_device_id, ++ sizeof(sink_id.ieee_device_id)); ++ ++ core_link_read_dpcd( ++ link, ++ DP_SINK_HW_REVISION_START, ++ (uint8_t *)&dp_hw_fw_revision, ++ sizeof(dp_hw_fw_revision)); ++ ++ link->dpcd_caps.sink_hw_revision = ++ dp_hw_fw_revision.ieee_hw_rev; ++ ++ memmove( ++ link->dpcd_caps.sink_fw_revision, ++ dp_hw_fw_revision.ieee_fw_rev, ++ sizeof(dp_hw_fw_revision.ieee_fw_rev)); ++ + /* Connectivity log: detection */ + CONN_DATA_DETECT(link, dpcd_data, sizeof(dpcd_data), "Rx Caps: "); + +diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h +index bb71717..e382582 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc.h ++++ b/drivers/gpu/drm/amd/display/dc/dc.h +@@ -641,9 +641,14 @@ struct dpcd_caps { + struct dc_dongle_caps dongle_caps; + + uint32_t sink_dev_id; ++ int8_t sink_dev_id_str[6]; ++ int8_t sink_hw_revision; ++ int8_t sink_fw_revision[2]; ++ + uint32_t branch_dev_id; + int8_t branch_dev_name[6]; + int8_t branch_hw_revision; ++ int8_t branch_fw_revision[2]; + + bool allow_invalid_MSA_timing_param; + bool panel_mode_edp; +diff --git a/drivers/gpu/drm/amd/display/include/dpcd_defs.h b/drivers/gpu/drm/amd/display/include/dpcd_defs.h +index d8e52e3..1c66166 100644 +--- a/drivers/gpu/drm/amd/display/include/dpcd_defs.h ++++ b/drivers/gpu/drm/amd/display/include/dpcd_defs.h +@@ -27,6 +27,9 @@ + #define __DAL_DPCD_DEFS_H__ + + #include <drm/drm_dp_helper.h> ++#ifndef DP_SINK_HW_REVISION_START // can remove this once the define gets into linux drm_dp_helper.h ++#define DP_SINK_HW_REVISION_START 0x409 ++#endif + + enum dpcd_revision { + DPCD_REV_10 = 0x10, +-- +2.7.4 + |