diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4882-drm-amd-powerplay-convert-the-sclk-mclk-into-Mhz-for.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4882-drm-amd-powerplay-convert-the-sclk-mclk-into-Mhz-for.patch | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4882-drm-amd-powerplay-convert-the-sclk-mclk-into-Mhz-for.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4882-drm-amd-powerplay-convert-the-sclk-mclk-into-Mhz-for.patch new file mode 100644 index 00000000..7fd2a393 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4882-drm-amd-powerplay-convert-the-sclk-mclk-into-Mhz-for.patch @@ -0,0 +1,42 @@ +From b8ecc8aa0d487fe215e348b2a5e2dff7dfc71ab6 Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Tue, 10 Jul 2018 11:35:16 +0800 +Subject: [PATCH 4882/5725] drm/amd/powerplay: convert the sclk/mclk into Mhz + for comparation + +Convert the clocks into right Mhz unit. Otherwise, it will miss +the equal situation. + +Signed-off-by: Evan Quan <evan.quan@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c +index cae76fe..c0ceb69 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c +@@ -1881,7 +1881,7 @@ static int vega12_print_clock_levels(struct pp_hwmgr *hwmgr, + for (i = 0; i < clocks.num_levels; i++) + size += sprintf(buf + size, "%d: %uMhz %s\n", + i, clocks.data[i].clocks_in_khz / 1000, +- (clocks.data[i].clocks_in_khz / 1000 == now) ? "*" : ""); ++ (clocks.data[i].clocks_in_khz / 1000 == now / 100) ? "*" : ""); + break; + + case PP_MCLK: +@@ -1897,7 +1897,7 @@ static int vega12_print_clock_levels(struct pp_hwmgr *hwmgr, + for (i = 0; i < clocks.num_levels; i++) + size += sprintf(buf + size, "%d: %uMhz %s\n", + i, clocks.data[i].clocks_in_khz / 1000, +- (clocks.data[i].clocks_in_khz / 1000 == now) ? "*" : ""); ++ (clocks.data[i].clocks_in_khz / 1000 == now / 100) ? "*" : ""); + break; + + case PP_PCIE: +-- +2.7.4 + |