diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4864-drm-amdgpu-Add-CLK-IP-base-offset.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4864-drm-amdgpu-Add-CLK-IP-base-offset.patch | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4864-drm-amdgpu-Add-CLK-IP-base-offset.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4864-drm-amdgpu-Add-CLK-IP-base-offset.patch new file mode 100644 index 00000000..abc86b25 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4864-drm-amdgpu-Add-CLK-IP-base-offset.patch @@ -0,0 +1,43 @@ +From 4e0dbe3aa690388e7e0d8821521eff46982a0ee4 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <rex.zhu@amd.com> +Date: Thu, 5 Jul 2018 16:34:13 +0800 +Subject: [PATCH 4864/5725] drm/amdgpu: Add CLK IP base offset + +so we can read/write the registers in CLK domain +through RREG32/WREG32_SOC15 + +Reviewed-by: Evan Quan <evan.quan@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + + drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index da75fb2e..80b88c3 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -1457,6 +1457,7 @@ enum amd_hw_ip_block_type { + PWR_HWIP, + NBIF_HWIP, + THM_HWIP, ++ CLK_HWIP, + MAX_HWIP + }; + +diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c +index 45aafca..c5c9b2b 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c ++++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c +@@ -51,6 +51,7 @@ int vega10_reg_base_init(struct amdgpu_device *adev) + adev->reg_offset[PWR_HWIP][i] = (uint32_t *)(&(PWR_BASE.instance[i])); + adev->reg_offset[NBIF_HWIP][i] = (uint32_t *)(&(NBIF_BASE.instance[i])); + adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i])); ++ adev->reg_offset[CLK_HWIP][i] = (uint32_t *)(&(CLK_BASE.instance[i])); + } + return 0; + } +-- +2.7.4 + |