diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4846-drm-amd-pp-Remove-duplicate-code-in-vega12_hwmgr.c.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4846-drm-amd-pp-Remove-duplicate-code-in-vega12_hwmgr.c.patch | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4846-drm-amd-pp-Remove-duplicate-code-in-vega12_hwmgr.c.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4846-drm-amd-pp-Remove-duplicate-code-in-vega12_hwmgr.c.patch new file mode 100644 index 00000000..bdbc42f9 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4846-drm-amd-pp-Remove-duplicate-code-in-vega12_hwmgr.c.patch @@ -0,0 +1,76 @@ +From cc7be832e02076702a2ff63163d46a5e30704cb4 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Wed, 20 Jun 2018 13:36:58 +0800 +Subject: [PATCH 4846/5725] drm/amd/pp: Remove duplicate code in vega12_hwmgr.c + +use smu_helper function smu_set_watermarks_for_clocks_ranges +in vega12_set_watermarks_for_clocks_ranges. + +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 43 +--------------------- + 1 file changed, 1 insertion(+), 42 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c +index 448014b..0a09075 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c +@@ -1786,52 +1786,11 @@ static int vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, + struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); + Watermarks_t *table = &(data->smc_state_table.water_marks_table); + struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; +- uint32_t i; + + if (!data->registry_data.disable_water_mark && + data->smu_features[GNLD_DPM_DCEFCLK].supported && + data->smu_features[GNLD_DPM_SOCCLK].supported) { +- for (i = 0; i < wm_with_clock_ranges->num_wm_sets_dmif; i++) { +- table->WatermarkRow[WM_DCEFCLK][i].MinClock = +- cpu_to_le16((uint16_t) +- (wm_with_clock_ranges->wm_sets_dmif[i].wm_min_dcefclk_in_khz) / +- 100); +- table->WatermarkRow[WM_DCEFCLK][i].MaxClock = +- cpu_to_le16((uint16_t) +- (wm_with_clock_ranges->wm_sets_dmif[i].wm_max_dcefclk_in_khz) / +- 100); +- table->WatermarkRow[WM_DCEFCLK][i].MinUclk = +- cpu_to_le16((uint16_t) +- (wm_with_clock_ranges->wm_sets_dmif[i].wm_min_memclk_in_khz) / +- 100); +- table->WatermarkRow[WM_DCEFCLK][i].MaxUclk = +- cpu_to_le16((uint16_t) +- (wm_with_clock_ranges->wm_sets_dmif[i].wm_max_memclk_in_khz) / +- 100); +- table->WatermarkRow[WM_DCEFCLK][i].WmSetting = (uint8_t) +- wm_with_clock_ranges->wm_sets_dmif[i].wm_set_id; +- } +- +- for (i = 0; i < wm_with_clock_ranges->num_wm_sets_mcif; i++) { +- table->WatermarkRow[WM_SOCCLK][i].MinClock = +- cpu_to_le16((uint16_t) +- (wm_with_clock_ranges->wm_sets_mcif[i].wm_min_socclk_in_khz) / +- 100); +- table->WatermarkRow[WM_SOCCLK][i].MaxClock = +- cpu_to_le16((uint16_t) +- (wm_with_clock_ranges->wm_sets_mcif[i].wm_max_socclk_in_khz) / +- 100); +- table->WatermarkRow[WM_SOCCLK][i].MinUclk = +- cpu_to_le16((uint16_t) +- (wm_with_clock_ranges->wm_sets_mcif[i].wm_min_memclk_in_khz) / +- 100); +- table->WatermarkRow[WM_SOCCLK][i].MaxUclk = +- cpu_to_le16((uint16_t) +- (wm_with_clock_ranges->wm_sets_mcif[i].wm_max_memclk_in_khz) / +- 100); +- table->WatermarkRow[WM_SOCCLK][i].WmSetting = (uint8_t) +- wm_with_clock_ranges->wm_sets_mcif[i].wm_set_id; +- } ++ smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges); + data->water_marks_bitmap |= WaterMarksExist; + data->water_marks_bitmap &= ~WaterMarksLoaded; + } +-- +2.7.4 + |