diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4827-drm-amd-powerplay-cosmetic-fix.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4827-drm-amd-powerplay-cosmetic-fix.patch | 104 |
1 files changed, 104 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4827-drm-amd-powerplay-cosmetic-fix.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4827-drm-amd-powerplay-cosmetic-fix.patch new file mode 100644 index 00000000..3750bee6 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4827-drm-amd-powerplay-cosmetic-fix.patch @@ -0,0 +1,104 @@ +From 01696c8ccbcb7718c2123a0d935cb1a3e493789e Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Mon, 11 Jun 2018 16:48:43 +0800 +Subject: [PATCH 4827/5725] drm/amd/powerplay: cosmetic fix + +Fix coding style and drop unused variable. + +Signed-off-by: Evan Quan <evan.quan@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 10 +++------- + .../gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h | 18 +++++++++--------- + 2 files changed, 12 insertions(+), 16 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c +index b673620..9e9a3db 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c +@@ -811,9 +811,6 @@ static int vega12_enable_all_smu_features(struct pp_hwmgr *hwmgr) + enabled = (features_enabled & data->smu_features[i].smu_feature_bitmap) ? true : false; + data->smu_features[i].enabled = enabled; + data->smu_features[i].supported = enabled; +- PP_ASSERT( +- !data->smu_features[i].allowed || enabled, +- "[EnableAllSMUFeatures] Enabled feature is different from allowed, expected disabled!"); + } + } + +@@ -1230,8 +1227,8 @@ static int vega12_get_current_gfx_clk_freq(struct pp_hwmgr *hwmgr, uint32_t *gfx + + *gfx_freq = 0; + +- PP_ASSERT_WITH_CODE( +- smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_GetDpmClockFreq, (PPCLK_GFXCLK << 16)) == 0, ++ PP_ASSERT_WITH_CODE(smum_send_msg_to_smc_with_parameter(hwmgr, ++ PPSMC_MSG_GetDpmClockFreq, (PPCLK_GFXCLK << 16)) == 0, + "[GetCurrentGfxClkFreq] Attempt to get Current GFXCLK Frequency Failed!", + return -1); + PP_ASSERT_WITH_CODE( +@@ -1790,7 +1787,6 @@ static int vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, + { + struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); + Watermarks_t *table = &(data->smc_state_table.water_marks_table); +- int result = 0; + uint32_t i; + + if (!data->registry_data.disable_water_mark && +@@ -1841,7 +1837,7 @@ static int vega12_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr, + data->water_marks_bitmap &= ~WaterMarksLoaded; + } + +- return result; ++ return 0; + } + + static int vega12_force_clock_level(struct pp_hwmgr *hwmgr, +diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h b/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h +index b08526f..b6ffd08 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h +@@ -412,10 +412,10 @@ typedef struct { + QuadraticInt_t ReservedEquation2; + QuadraticInt_t ReservedEquation3; + +- uint16_t MinVoltageUlvGfx; +- uint16_t MinVoltageUlvSoc; ++ uint16_t MinVoltageUlvGfx; ++ uint16_t MinVoltageUlvSoc; + +- uint32_t Reserved[14]; ++ uint32_t Reserved[14]; + + + +@@ -483,9 +483,9 @@ typedef struct { + uint8_t padding8_4; + + +- uint8_t PllGfxclkSpreadEnabled; +- uint8_t PllGfxclkSpreadPercent; +- uint16_t PllGfxclkSpreadFreq; ++ uint8_t PllGfxclkSpreadEnabled; ++ uint8_t PllGfxclkSpreadPercent; ++ uint16_t PllGfxclkSpreadFreq; + + uint8_t UclkSpreadEnabled; + uint8_t UclkSpreadPercent; +@@ -495,9 +495,9 @@ typedef struct { + uint8_t SocclkSpreadPercent; + uint16_t SocclkSpreadFreq; + +- uint8_t AcgGfxclkSpreadEnabled; +- uint8_t AcgGfxclkSpreadPercent; +- uint16_t AcgGfxclkSpreadFreq; ++ uint8_t AcgGfxclkSpreadEnabled; ++ uint8_t AcgGfxclkSpreadPercent; ++ uint16_t AcgGfxclkSpreadFreq; + + uint8_t Vr2_I2C_address; + uint8_t padding_vr2[3]; +-- +2.7.4 + |