diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4826-drm-amd-powerplay-set-vega12-pre-display-configurati.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4826-drm-amd-powerplay-set-vega12-pre-display-configurati.patch | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4826-drm-amd-powerplay-set-vega12-pre-display-configurati.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4826-drm-amd-powerplay-set-vega12-pre-display-configurati.patch new file mode 100644 index 00000000..73c30102 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4826-drm-amd-powerplay-set-vega12-pre-display-configurati.patch @@ -0,0 +1,78 @@ +From 76bafbf7f72090f72c7bfff21f1b5851a7f92f15 Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Mon, 11 Jun 2018 17:22:33 +0800 +Subject: [PATCH 4826/5725] drm/amd/powerplay: set vega12 pre display + configurations + +Set num_displays to 0 and force uclk high as part of the mode +set sequence. + +Signed-off-by: Evan Quan <evan.quan@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 41 ++++++++++++++++++++++ + 1 file changed, 41 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c +index 9125bc5..b673620 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c +@@ -2111,6 +2111,45 @@ static int vega12_apply_clocks_adjust_rules(struct pp_hwmgr *hwmgr) + return 0; + } + ++static int vega12_set_uclk_to_highest_dpm_level(struct pp_hwmgr *hwmgr, ++ struct vega12_single_dpm_table *dpm_table) ++{ ++ struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); ++ int ret = 0; ++ ++ if (data->smu_features[GNLD_DPM_UCLK].enabled) { ++ PP_ASSERT_WITH_CODE(dpm_table->count > 0, ++ "[SetUclkToHightestDpmLevel] Dpm table has no entry!", ++ return -EINVAL); ++ PP_ASSERT_WITH_CODE(dpm_table->count <= NUM_UCLK_DPM_LEVELS, ++ "[SetUclkToHightestDpmLevel] Dpm table has too many entries!", ++ return -EINVAL); ++ ++ dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value; ++ PP_ASSERT_WITH_CODE(!(ret = smum_send_msg_to_smc_with_parameter(hwmgr, ++ PPSMC_MSG_SetHardMinByFreq, ++ (PPCLK_UCLK << 16 ) | dpm_table->dpm_state.hard_min_level)), ++ "[SetUclkToHightestDpmLevel] Set hard min uclk failed!", ++ return ret); ++ } ++ ++ return ret; ++} ++ ++static int vega12_pre_display_configuration_changed_task(struct pp_hwmgr *hwmgr) ++{ ++ struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); ++ int ret = 0; ++ ++ smum_send_msg_to_smc_with_parameter(hwmgr, ++ PPSMC_MSG_NumOfDisplays, 0); ++ ++ ret = vega12_set_uclk_to_highest_dpm_level(hwmgr, ++ &data->dpm_table.mem_table); ++ ++ return ret; ++} ++ + static int vega12_display_configuration_changed_task(struct pp_hwmgr *hwmgr) + { + struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend); +@@ -2365,6 +2404,8 @@ static const struct pp_hwmgr_func vega12_hwmgr_funcs = { + .print_clock_levels = vega12_print_clock_levels, + .apply_clocks_adjust_rules = + vega12_apply_clocks_adjust_rules, ++ .pre_display_config_changed = ++ vega12_pre_display_configuration_changed_task, + .display_config_changed = vega12_display_configuration_changed_task, + .powergate_uvd = vega12_power_gate_uvd, + .powergate_vce = vega12_power_gate_vce, +-- +2.7.4 + |