diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4823-drm-amd-powerplay-drop-unnecessary-uclk-hard-min-set.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4823-drm-amd-powerplay-drop-unnecessary-uclk-hard-min-set.patch | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4823-drm-amd-powerplay-drop-unnecessary-uclk-hard-min-set.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4823-drm-amd-powerplay-drop-unnecessary-uclk-hard-min-set.patch new file mode 100644 index 00000000..2ef10e81 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4823-drm-amd-powerplay-drop-unnecessary-uclk-hard-min-set.patch @@ -0,0 +1,47 @@ +From 185d9c1590607f9522ee83f2f63e046d612a190e Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Wed, 20 Jun 2018 12:28:10 +0800 +Subject: [PATCH 4823/5725] drm/amd/powerplay: drop unnecessary uclk hard min + setting + +We don't need to set uclk hard min here because this will +be set with other clocks on power state change. + +Signed-off-by: Evan Quan <evan.quan@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 10 ---------- + 1 file changed, 10 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c +index 177fe78..ea0ad3e 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c +@@ -1400,7 +1400,6 @@ static int vega12_notify_smc_display_config_after_ps_adjustment( + (struct vega12_hwmgr *)(hwmgr->backend); + struct PP_Clocks min_clocks = {0}; + struct pp_display_clock_request clock_req; +- uint32_t clk_request; + + if ((hwmgr->display_config->num_display > 1) && + !hwmgr->display_config->multi_monitor_in_sync) +@@ -1428,15 +1427,6 @@ static int vega12_notify_smc_display_config_after_ps_adjustment( + } + } + +- if (data->smu_features[GNLD_DPM_UCLK].enabled) { +- clk_request = (PPCLK_UCLK << 16) | (min_clocks.memoryClock) / 100; +- PP_ASSERT_WITH_CODE( +- smum_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_SetHardMinByFreq, clk_request) == 0, +- "[PhwVega12_NotifySMCDisplayConfigAfterPowerStateAdjustment] Attempt to set UCLK HardMin Failed!", +- return -1); +- data->dpm_table.mem_table.dpm_state.hard_min_level = min_clocks.memoryClock; +- } +- + return 0; + } + +-- +2.7.4 + |