diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4727-drm-amdgpu-Use-real-power-source-in-powerplay-instan.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4727-drm-amdgpu-Use-real-power-source-in-powerplay-instan.patch | 318 |
1 files changed, 318 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4727-drm-amdgpu-Use-real-power-source-in-powerplay-instan.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4727-drm-amdgpu-Use-real-power-source-in-powerplay-instan.patch new file mode 100644 index 00000000..432961b0 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4727-drm-amdgpu-Use-real-power-source-in-powerplay-instan.patch @@ -0,0 +1,318 @@ +From a7e256e7ea16def7c5b52790ce6e7863d8617e7a Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Mon, 4 Jun 2018 16:39:38 +0800 +Subject: [PATCH 4727/5725] drm/amdgpu: Use real power source in powerplay + instand of hardcode + +1. move ac_power to struct pm from dpm, so can be shared with powerplay +2. remove power_source in powerplay, use adev->pm.ac_power instand. +3. update ac_power before dispatch power task. + +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 2 +- + drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 21 +++++++------ + drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 12 ++++---- + drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 2 +- + drivers/gpu/drm/amd/amdgpu/si_dpm.c | 4 +-- + drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 1 - + drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 6 ++-- + drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 5 +-- + drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 2 -- + .../gpu/drm/amd/powerplay/inc/pp_power_source.h | 36 ---------------------- + 10 files changed, 27 insertions(+), 64 deletions(-) + delete mode 100644 drivers/gpu/drm/amd/powerplay/inc/pp_power_source.h + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h +index dd6203a..9acfbee 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h +@@ -402,7 +402,6 @@ struct amdgpu_dpm { + u32 tdp_adjustment; + u16 load_line_slope; + bool power_control; +- bool ac_power; + /* special states active */ + bool thermal_active; + bool uvd_active; +@@ -439,6 +438,7 @@ struct amdgpu_pm { + struct amd_pp_display_configuration pm_display_cfg;/* set by dc */ + uint32_t smu_prv_buffer_size; + struct amdgpu_bo *smu_prv_buffer; ++ bool ac_power; + }; + + #define R600_SSTU_DFLT 0 +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +index 31fbbcd..bc2dd4f9 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +@@ -68,11 +68,11 @@ void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev) + if (adev->pm.dpm_enabled) { + mutex_lock(&adev->pm.mutex); + if (power_supply_is_system_supplied() > 0) +- adev->pm.dpm.ac_power = true; ++ adev->pm.ac_power = true; + else +- adev->pm.dpm.ac_power = false; ++ adev->pm.ac_power = false; + if (adev->powerplay.pp_funcs->enable_bapm) +- amdgpu_dpm_enable_bapm(adev, adev->pm.dpm.ac_power); ++ amdgpu_dpm_enable_bapm(adev, adev->pm.ac_power); + mutex_unlock(&adev->pm.mutex); + } + } +@@ -1906,6 +1906,14 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev) + amdgpu_fence_wait_empty(ring); + } + ++ mutex_lock(&adev->pm.mutex); ++ /* update battery/ac status */ ++ if (power_supply_is_system_supplied() > 0) ++ adev->pm.ac_power = true; ++ else ++ adev->pm.ac_power = false; ++ mutex_unlock(&adev->pm.mutex); ++ + if (adev->powerplay.pp_funcs->dispatch_tasks) { + if (!amdgpu_device_has_dc_support(adev)) { + mutex_lock(&adev->pm.mutex); +@@ -1926,14 +1934,7 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev) + } else { + mutex_lock(&adev->pm.mutex); + amdgpu_dpm_get_active_displays(adev); +- /* update battery/ac status */ +- if (power_supply_is_system_supplied() > 0) +- adev->pm.dpm.ac_power = true; +- else +- adev->pm.dpm.ac_power = false; +- + amdgpu_dpm_change_power_state_locked(adev); +- + mutex_unlock(&adev->pm.mutex); + } + } +diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +index a266dcf..b6248c0 100644 +--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c ++++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +@@ -951,12 +951,12 @@ static void ci_apply_state_adjust_rules(struct amdgpu_device *adev, + else + pi->battery_state = false; + +- if (adev->pm.dpm.ac_power) ++ if (adev->pm.ac_power) + max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; + else + max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; + +- if (adev->pm.dpm.ac_power == false) { ++ if (adev->pm.ac_power == false) { + for (i = 0; i < ps->performance_level_count; i++) { + if (ps->performance_levels[i].mclk > max_limits->mclk) + ps->performance_levels[i].mclk = max_limits->mclk; +@@ -4078,7 +4078,7 @@ static int ci_enable_uvd_dpm(struct amdgpu_device *adev, bool enable) + const struct amdgpu_clock_and_voltage_limits *max_limits; + int i; + +- if (adev->pm.dpm.ac_power) ++ if (adev->pm.ac_power) + max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; + else + max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; +@@ -4127,7 +4127,7 @@ static int ci_enable_vce_dpm(struct amdgpu_device *adev, bool enable) + const struct amdgpu_clock_and_voltage_limits *max_limits; + int i; + +- if (adev->pm.dpm.ac_power) ++ if (adev->pm.ac_power) + max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; + else + max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; +@@ -4160,7 +4160,7 @@ static int ci_enable_samu_dpm(struct amdgpu_device *adev, bool enable) + const struct amdgpu_clock_and_voltage_limits *max_limits; + int i; + +- if (adev->pm.dpm.ac_power) ++ if (adev->pm.ac_power) + max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; + else + max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; +@@ -4191,7 +4191,7 @@ static int ci_enable_acp_dpm(struct amdgpu_device *adev, bool enable) + const struct amdgpu_clock_and_voltage_limits *max_limits; + int i; + +- if (adev->pm.dpm.ac_power) ++ if (adev->pm.ac_power) + max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; + else + max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; +diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c +index 17f7f07..d79e6f5 100644 +--- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c ++++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c +@@ -1921,7 +1921,7 @@ static int kv_dpm_set_power_state(void *handle) + int ret; + + if (pi->bapm_enable) { +- ret = amdgpu_kv_smc_bapm_enable(adev, adev->pm.dpm.ac_power); ++ ret = amdgpu_kv_smc_bapm_enable(adev, adev->pm.ac_power); + if (ret) { + DRM_ERROR("amdgpu_kv_smc_bapm_enable failed\n"); + return ret; +diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c +index b12d7c9..9567dd0 100644 +--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c ++++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c +@@ -3480,7 +3480,7 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev, + disable_sclk_switching = true; + } + +- if (adev->pm.dpm.ac_power) ++ if (adev->pm.ac_power) + max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; + else + max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; +@@ -3489,7 +3489,7 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev, + if (ps->performance_levels[i].vddc > ps->performance_levels[i+1].vddc) + ps->performance_levels[i].vddc = ps->performance_levels[i+1].vddc; + } +- if (adev->pm.dpm.ac_power == false) { ++ if (adev->pm.ac_power == false) { + for (i = 0; i < ps->performance_level_count; i++) { + if (ps->performance_levels[i].mclk > max_limits->mclk) + ps->performance_levels[i].mclk = max_limits->mclk; +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +index 4ef77ce..9b675d9 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +@@ -81,7 +81,6 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr) + return -EINVAL; + + hwmgr->usec_timeout = AMD_MAX_USEC_TIMEOUT; +- hwmgr->power_source = PP_PowerSource_AC; + hwmgr->pp_table_version = PP_TABLE_V1; + hwmgr->dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; + hwmgr->request_dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +index d464deb..2d83afe 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +@@ -2877,7 +2877,7 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, + struct pp_power_state *request_ps, + const struct pp_power_state *current_ps) + { +- ++ struct amdgpu_device *adev = hwmgr->adev; + struct smu7_power_state *smu7_ps = + cast_phw_smu7_power_state(&request_ps->hardware); + uint32_t sclk; +@@ -2900,12 +2900,12 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, + "VI should always have 2 performance levels", + ); + +- max_limits = (PP_PowerSource_AC == hwmgr->power_source) ? ++ max_limits = adev->pm.ac_power ? + &(hwmgr->dyn_state.max_clock_voltage_on_ac) : + &(hwmgr->dyn_state.max_clock_voltage_on_dc); + + /* Cap clock DPM tables at DC MAX if it is in DC. */ +- if (PP_PowerSource_DC == hwmgr->power_source) { ++ if (!adev->pm.ac_power) { + for (i = 0; i < smu7_ps->performance_level_count; i++) { + if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) + smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +index 8be5a71..da29871 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +@@ -3107,6 +3107,7 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, + struct pp_power_state *request_ps, + const struct pp_power_state *current_ps) + { ++ struct amdgpu_device *adev = hwmgr->adev; + struct vega10_power_state *vega10_ps = + cast_phw_vega10_power_state(&request_ps->hardware); + uint32_t sclk; +@@ -3132,12 +3133,12 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, + if (vega10_ps->performance_level_count != 2) + pr_info("VI should always have 2 performance levels"); + +- max_limits = (PP_PowerSource_AC == hwmgr->power_source) ? ++ max_limits = adev->pm.ac_power ? + &(hwmgr->dyn_state.max_clock_voltage_on_ac) : + &(hwmgr->dyn_state.max_clock_voltage_on_dc); + + /* Cap clock DPM tables at DC MAX if it is in DC. */ +- if (PP_PowerSource_DC == hwmgr->power_source) { ++ if (!adev->pm.ac_power) { + for (i = 0; i < vega10_ps->performance_level_count; i++) { + if (vega10_ps->performance_levels[i].mem_clock > + max_limits->mclk) +diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +index b99fb8a..40c98ca 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +@@ -26,7 +26,6 @@ + #include <linux/seq_file.h> + #include "amd_powerplay.h" + #include "hardwaremanager.h" +-#include "pp_power_source.h" + #include "hwmgr_ppt.h" + #include "ppatomctrl.h" + #include "hwmgr_ppt.h" +@@ -741,7 +740,6 @@ struct pp_hwmgr { + const struct pp_table_func *pptable_func; + + struct pp_power_state *ps; +- enum pp_power_source power_source; + uint32_t num_ps; + struct pp_thermal_controller_info thermal_controller; + bool fan_ctrl_is_in_default_mode; +diff --git a/drivers/gpu/drm/amd/powerplay/inc/pp_power_source.h b/drivers/gpu/drm/amd/powerplay/inc/pp_power_source.h +deleted file mode 100644 +index b43315c..0000000 +--- a/drivers/gpu/drm/amd/powerplay/inc/pp_power_source.h ++++ /dev/null +@@ -1,36 +0,0 @@ +-/* +- * Copyright 2015 Advanced Micro Devices, Inc. +- * +- * Permission is hereby granted, free of charge, to any person obtaining a +- * copy of this software and associated documentation files (the "Software"), +- * to deal in the Software without restriction, including without limitation +- * the rights to use, copy, modify, merge, publish, distribute, sublicense, +- * and/or sell copies of the Software, and to permit persons to whom the +- * Software is furnished to do so, subject to the following conditions: +- * +- * The above copyright notice and this permission notice shall be included in +- * all copies or substantial portions of the Software. +- * +- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR +- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, +- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR +- * OTHER DEALINGS IN THE SOFTWARE. +- * +- */ +- +-#ifndef PP_POWERSOURCE_H +-#define PP_POWERSOURCE_H +- +-enum pp_power_source { +- PP_PowerSource_AC = 0, +- PP_PowerSource_DC, +- PP_PowerSource_LimitedPower, +- PP_PowerSource_LimitedPower_2, +- PP_PowerSource_Max +-}; +- +- +-#endif +-- +2.7.4 + |