aboutsummaryrefslogtreecommitdiffstats
path: root/common/recipes-kernel/linux/linux-yocto-4.14.71/4722-drm-amd-pp-Make-sure-clock_voltage_limit_table-on-dc.patch
diff options
context:
space:
mode:
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4722-drm-amd-pp-Make-sure-clock_voltage_limit_table-on-dc.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/4722-drm-amd-pp-Make-sure-clock_voltage_limit_table-on-dc.patch35
1 files changed, 35 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4722-drm-amd-pp-Make-sure-clock_voltage_limit_table-on-dc.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4722-drm-amd-pp-Make-sure-clock_voltage_limit_table-on-dc.patch
new file mode 100644
index 00000000..96fe49b4
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4722-drm-amd-pp-Make-sure-clock_voltage_limit_table-on-dc.patch
@@ -0,0 +1,35 @@
+From 60a92e96817e7d96956110b61bf49c5d9b3e8802 Mon Sep 17 00:00:00 2001
+From: Rex Zhu <Rex.Zhu@amd.com>
+Date: Wed, 13 Jun 2018 18:53:49 +0800
+Subject: [PATCH 4722/5725] drm/amd/pp: Make sure clock_voltage_limit_table on
+ dc is valid
+
+if vbios not set the max clock voltage limit table for DC mode,
+Set the table as sama as the table for AC mode.
+
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
+index e63bc47..4ef77ce 100644
+--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
+@@ -236,6 +236,11 @@ int hwmgr_hw_init(struct pp_hwmgr *hwmgr)
+ ret = hwmgr->hwmgr_func->backend_init(hwmgr);
+ if (ret)
+ goto err1;
++ /* make sure dc limits are valid */
++ if ((hwmgr->dyn_state.max_clock_voltage_on_dc.sclk == 0) ||
++ (hwmgr->dyn_state.max_clock_voltage_on_dc.mclk == 0))
++ hwmgr->dyn_state.max_clock_voltage_on_dc =
++ hwmgr->dyn_state.max_clock_voltage_on_ac;
+
+ ret = psm_init_power_state_table(hwmgr);
+ if (ret)
+--
+2.7.4
+