diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4712-drm-amdgpu-fix-user-fence-write-race-condition.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4712-drm-amdgpu-fix-user-fence-write-race-condition.patch | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4712-drm-amdgpu-fix-user-fence-write-race-condition.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4712-drm-amdgpu-fix-user-fence-write-race-condition.patch new file mode 100644 index 00000000..d9a10f3f --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4712-drm-amdgpu-fix-user-fence-write-race-condition.patch @@ -0,0 +1,58 @@ +From 2a3e01dbb09c6021cde101650d1555ca5d28b4e4 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?= <nicolai.haehnle@amd.com> +Date: Fri, 29 Jun 2018 13:23:25 +0200 +Subject: [PATCH 4712/5725] drm/amdgpu: fix user fence write race condition +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The buffer object backing the user fence is reserved using the non-user +fence, i.e., as soon as the non-user fence is signaled, the user fence +buffer object can be moved or even destroyed. + +Therefore, emit the user fence first. + +Both fences have the same cache invalidation behavior, so this should +have no user-visible effect. + +Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Cc: stable@vger.kernel.org +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c +index 5a21f9c..5f05d15d 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c +@@ -238,6 +238,12 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, + if (ib->flags & AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE) + fence_flags |= AMDGPU_FENCE_FLAG_TC_WB_ONLY; + ++ /* wrap the last IB with fence */ ++ if (job && job->uf_addr) { ++ amdgpu_ring_emit_fence(ring, job->uf_addr, job->uf_sequence, ++ fence_flags | AMDGPU_FENCE_FLAG_64BIT); ++ } ++ + r = amdgpu_fence_emit(ring, f, fence_flags); + if (r) { + dev_err(adev->dev, "failed to emit fence (%d)\n", r); +@@ -250,12 +256,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, + if (ring->funcs->insert_end) + ring->funcs->insert_end(ring); + +- /* wrap the last IB with fence */ +- if (job && job->uf_addr) { +- amdgpu_ring_emit_fence(ring, job->uf_addr, job->uf_sequence, +- fence_flags | AMDGPU_FENCE_FLAG_64BIT); +- } +- + if (patch_offset != ~0 && ring->funcs->patch_cond_exec) + amdgpu_ring_patch_cond_exec(ring, patch_offset); + +-- +2.7.4 + |