diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4603-drm-amdgpu-set-jpeg-ring-functions.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4603-drm-amdgpu-set-jpeg-ring-functions.patch | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4603-drm-amdgpu-set-jpeg-ring-functions.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4603-drm-amdgpu-set-jpeg-ring-functions.patch new file mode 100644 index 00000000..0db2e4ef --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4603-drm-amdgpu-set-jpeg-ring-functions.patch @@ -0,0 +1,91 @@ +From bad91ddc41b9de711eca71ae5881886bf0f3965c Mon Sep 17 00:00:00 2001 +From: Boyuan Zhang <boyuan.zhang@amd.com> +Date: Wed, 30 May 2018 14:23:33 -0400 +Subject: [PATCH 4603/5725] drm/amdgpu: set jpeg ring functions +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Set all vcn jpeg ring function pointers. + +Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 40 +++++++++++++++++++++++++++++++++++ + 1 file changed, 40 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c +index 32bd4c6..318c9fc 100644 +--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c +@@ -38,6 +38,7 @@ + static int vcn_v1_0_stop(struct amdgpu_device *adev); + static void vcn_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev); + static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev); ++static void vcn_v1_0_set_jpeg_ring_funcs(struct amdgpu_device *adev); + static void vcn_v1_0_set_irq_funcs(struct amdgpu_device *adev); + + /** +@@ -55,6 +56,7 @@ static int vcn_v1_0_early_init(void *handle) + + vcn_v1_0_set_dec_ring_funcs(adev); + vcn_v1_0_set_enc_ring_funcs(adev); ++ vcn_v1_0_set_jpeg_ring_funcs(adev); + vcn_v1_0_set_irq_funcs(adev); + + return 0; +@@ -1597,6 +1599,38 @@ static const struct amdgpu_ring_funcs vcn_v1_0_enc_ring_vm_funcs = { + .emit_reg_write_reg_wait = amdgpu_ring_emit_reg_write_reg_wait_helper, + }; + ++static const struct amdgpu_ring_funcs vcn_v1_0_jpeg_ring_vm_funcs = { ++ .type = AMDGPU_RING_TYPE_VCN_JPEG, ++ .align_mask = 0xf, ++ .nop = PACKET0(0x81ff, 0), ++ .support_64bit_ptrs = false, ++ .vmhub = AMDGPU_MMHUB, ++ .get_rptr = vcn_v1_0_jpeg_ring_get_rptr, ++ .get_wptr = vcn_v1_0_jpeg_ring_get_wptr, ++ .set_wptr = vcn_v1_0_jpeg_ring_set_wptr, ++ .emit_frame_size = ++ 6 + 6 + /* hdp invalidate / flush */ ++ SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 + ++ SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 + ++ 8 + /* vcn_v1_0_dec_ring_emit_vm_flush */ ++ 14 + 14 + /* vcn_v1_0_dec_ring_emit_fence x2 vm fence */ ++ 6, ++ .emit_ib_size = 22, /* vcn_v1_0_dec_ring_emit_ib */ ++ .emit_ib = vcn_v1_0_jpeg_ring_emit_ib, ++ .emit_fence = vcn_v1_0_jpeg_ring_emit_fence, ++ .emit_vm_flush = vcn_v1_0_jpeg_ring_emit_vm_flush, ++ //.test_ring ++ //.test_ib ++ .insert_nop = vcn_v1_0_jpeg_ring_nop, ++ .insert_start = vcn_v1_0_jpeg_ring_insert_start, ++ .insert_end = vcn_v1_0_jpeg_ring_insert_end, ++ .pad_ib = amdgpu_ring_generic_pad_ib, ++ .begin_use = amdgpu_vcn_ring_begin_use, ++ .end_use = amdgpu_vcn_ring_end_use, ++ .emit_wreg = vcn_v1_0_jpeg_ring_emit_wreg, ++ .emit_reg_wait = vcn_v1_0_jpeg_ring_emit_reg_wait, ++}; ++ + static void vcn_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev) + { + adev->vcn.ring_dec.funcs = &vcn_v1_0_dec_ring_vm_funcs; +@@ -1613,6 +1647,12 @@ static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev) + DRM_INFO("VCN encode is enabled in VM mode\n"); + } + ++static void vcn_v1_0_set_jpeg_ring_funcs(struct amdgpu_device *adev) ++{ ++ adev->vcn.ring_jpeg.funcs = &vcn_v1_0_jpeg_ring_vm_funcs; ++ DRM_INFO("VCN jpeg decode is enabled in VM mode\n"); ++} ++ + static const struct amdgpu_irq_src_funcs vcn_v1_0_irq_funcs = { + .set = vcn_v1_0_set_interrupt_state, + .process = vcn_v1_0_process_interrupt, +-- +2.7.4 + |