diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4559-drm-amdgpu-display-drop-DRM_AMD_DC_FBC-kconfig-optio.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4559-drm-amdgpu-display-drop-DRM_AMD_DC_FBC-kconfig-optio.patch | 292 |
1 files changed, 292 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4559-drm-amdgpu-display-drop-DRM_AMD_DC_FBC-kconfig-optio.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4559-drm-amdgpu-display-drop-DRM_AMD_DC_FBC-kconfig-optio.patch new file mode 100644 index 00000000..4321a321 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4559-drm-amdgpu-display-drop-DRM_AMD_DC_FBC-kconfig-optio.patch @@ -0,0 +1,292 @@ +From 2ed614c212983f8f593fd4fe3ad0d296ea8f027b Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Thu, 31 May 2018 09:09:59 -0500 +Subject: [PATCH 4559/5725] drm/amdgpu/display: drop DRM_AMD_DC_FBC kconfig + option + +Just enable it always. This was leftover from feature +bring up. + +Reviewed-by: Harry Wentland <harry.wentland@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Kalyan Alle <kalyan.alle@amd.com> +--- + drivers/gpu/drm/amd/display/Kconfig | 10 ---------- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 +---- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 5 +---- + drivers/gpu/drm/amd/display/dc/dc.h | 2 -- + drivers/gpu/drm/amd/display/dc/dc_types.h | 2 -- + .../drm/amd/display/dc/dce110/dce110_compressor.c | 2 -- + .../amd/display/dc/dce110/dce110_hw_sequencer.c | 22 ++-------------------- + .../drm/amd/display/dc/dce110/dce110_resource.c | 7 +------ + 8 files changed, 5 insertions(+), 50 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/Kconfig b/drivers/gpu/drm/amd/display/Kconfig +index c3d49f8..88e763f 100644 +--- a/drivers/gpu/drm/amd/display/Kconfig ++++ b/drivers/gpu/drm/amd/display/Kconfig +@@ -9,16 +9,6 @@ config DRM_AMD_DC + support for AMDGPU.This adds required support for Vega and + Raven ASICs. + +-config DRM_AMD_DC_FBC +- bool "AMD FBC - Enable Frame Buffer Compression" +- depends on DRM_AMD_DC +- help +- Choose this option if you want to use frame buffer compression +- support. +- This is a power optimisation feature, check its availability +- on your hardware before enabling this option. +- +- + config DRM_AMD_DC_DCN1_0 + bool "DCN 1.0 Raven family" + depends on DRM_AMD_DC && X86 +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index 48bd8f2..792fd09 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -345,7 +345,6 @@ static void hotplug_notify_work_func(struct work_struct *work) + drm_kms_helper_hotplug_event(dev); + } + +-#if defined(CONFIG_DRM_AMD_DC_FBC) + /* Allocate memory for FBC compressed data */ + static void amdgpu_dm_fbc_init(struct drm_connector *connector) + { +@@ -386,7 +385,6 @@ static void amdgpu_dm_fbc_init(struct drm_connector *connector) + } + + } +-#endif + + + /* Init display KMS +@@ -3617,9 +3615,8 @@ static int amdgpu_dm_connector_get_modes(struct drm_connector *connector) + amdgpu_dm_connector_ddc_get_modes(connector, edid); + amdgpu_dm_connector_add_common_modes(encoder, connector); + +-#if defined(CONFIG_DRM_AMD_DC_FBC) + amdgpu_dm_fbc_init(connector); +-#endif ++ + return amdgpu_dm_connector->num_modes; + } + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +index 51c09a4..88b646e 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +@@ -72,13 +72,11 @@ struct irq_list_head { + struct work_struct work; + }; + +-#if defined(CONFIG_DRM_AMD_DC_FBC) + struct dm_comressor_info { + void *cpu_addr; + struct amdgpu_bo *bo_ptr; + uint64_t gpu_addr; + }; +-#endif + + /** + * for_each_oldnew_plane_in_state_reverse - iterate over all planes in an atomic +@@ -152,9 +150,8 @@ struct amdgpu_display_manager { + * Caches device atomic state for suspend/resume + */ + struct drm_atomic_state *cached_state; +-#if defined(CONFIG_DRM_AMD_DC_FBC) ++ + struct dm_comressor_info compressor; +-#endif + }; + + struct amdgpu_dm_connector { +diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h +index 0d64023..23a5045 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc.h ++++ b/drivers/gpu/drm/amd/display/dc/dc.h +@@ -289,9 +289,7 @@ struct dc { + bool apply_edp_fast_boot_optimization; + + /* FBC compressor */ +-#if defined(CONFIG_DRM_AMD_DC_FBC) + struct compressor *fbc_compressor; +-#endif + }; + + enum frame_buffer_mode { +diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h +index f463d3a..40d620f 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc_types.h ++++ b/drivers/gpu/drm/amd/display/dc/dc_types.h +@@ -92,9 +92,7 @@ struct dc_context { + bool created_bios; + struct gpio_service *gpio_service; + struct i2caux *i2caux; +-#if defined(CONFIG_DRM_AMD_DC_FBC) + uint64_t fbc_gpu_addr; +-#endif + }; + + +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c +index e2994d3..a79fc0b 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_compressor.c +@@ -551,9 +551,7 @@ void dce110_compressor_construct(struct dce110_compressor *compressor, + compressor->base.lpt_channels_num = 0; + compressor->base.attached_inst = 0; + compressor->base.is_enabled = false; +-#if defined(CONFIG_DRM_AMD_DC_FBC) + compressor->base.funcs = &dce110_compressor_funcs; + +-#endif + } + +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +index 2c3b289..4cd6bc0 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +@@ -34,9 +34,7 @@ + #include "dce/dce_hwseq.h" + #include "gpio_service_interface.h" + +-#if defined(CONFIG_DRM_AMD_DC_FBC) + #include "dce110_compressor.h" +-#endif + + #include "bios/bios_parser_helper.h" + #include "timing_generator.h" +@@ -1471,10 +1469,8 @@ static void power_down_all_hw_blocks(struct dc *dc) + + power_down_clock_sources(dc); + +-#if defined(CONFIG_DRM_AMD_DC_FBC) + if (dc->fbc_compressor) + dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor); +-#endif + } + + static void disable_vga_and_power_gate_all_controllers( +@@ -1724,9 +1720,7 @@ static void set_static_screen_control(struct pipe_ctx **pipe_ctx, + if (events->force_trigger) + value |= 0x1; + +-#if defined(CONFIG_DRM_AMD_DC_FBC) + value |= 0x84; +-#endif + + for (i = 0; i < num_pipes; i++) + pipe_ctx[i]->stream_res.tg->funcs-> +@@ -1854,8 +1848,6 @@ static void apply_min_clocks( + } + } + +-#if defined(CONFIG_DRM_AMD_DC_FBC) +- + /* + * Check if FBC can be enabled + */ +@@ -1934,7 +1926,6 @@ static void enable_fbc(struct dc *dc, + compr->funcs->enable_fbc(compr, ¶ms); + } + } +-#endif + + static void dce110_reset_hw_ctx_wrap( + struct dc *dc, +@@ -2110,10 +2101,9 @@ enum dc_status dce110_apply_ctx_to_hw( + + set_safe_displaymarks(&context->res_ctx, dc->res_pool); + +-#if defined(CONFIG_DRM_AMD_DC_FBC) + if (dc->fbc_compressor) + dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor); +-#endif ++ + /*TODO: when pplib works*/ + apply_min_clocks(dc, context, &clocks_state, true); + +@@ -2191,12 +2181,9 @@ enum dc_status dce110_apply_ctx_to_hw( + + dcb->funcs->set_scratch_critical_state(dcb, false); + +-#if defined(CONFIG_DRM_AMD_DC_FBC) + if (dc->fbc_compressor) + enable_fbc(dc, context); + +-#endif +- + return DC_OK; + } + +@@ -2511,10 +2498,9 @@ static void init_hw(struct dc *dc) + abm->funcs->init_backlight(abm); + abm->funcs->abm_init(abm); + } +-#if defined(CONFIG_DRM_AMD_DC_FBC) ++ + if (dc->fbc_compressor) + dc->fbc_compressor->funcs->power_up_fbc(dc->fbc_compressor); +-#endif + + } + +@@ -2700,9 +2686,7 @@ static void dce110_program_front_end_for_pipe( + struct dc_plane_state *plane_state = pipe_ctx->plane_state; + struct xfm_grph_csc_adjustment adjust; + struct out_csc_color_matrix tbl_entry; +-#if defined(CONFIG_DRM_AMD_DC_FBC) + unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; +-#endif + unsigned int i; + DC_LOGGER_INIT(); + memset(&tbl_entry, 0, sizeof(tbl_entry)); +@@ -2743,7 +2727,6 @@ static void dce110_program_front_end_for_pipe( + + program_scaler(dc, pipe_ctx); + +-#if defined(CONFIG_DRM_AMD_DC_FBC) + /* fbc not applicable on Underlay pipe */ + if (dc->fbc_compressor && old_pipe->stream && + pipe_ctx->pipe_idx != underlay_idx) { +@@ -2752,7 +2735,6 @@ static void dce110_program_front_end_for_pipe( + else + enable_fbc(dc, dc->current_state); + } +-#endif + + mi->funcs->mem_input_program_surface_config( + mi, +diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +index ee33786..20c0290 100644 +--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c +@@ -54,9 +54,8 @@ + + #define DC_LOGGER \ + dc->ctx->logger +-#if defined(CONFIG_DRM_AMD_DC_FBC) ++ + #include "dce110/dce110_compressor.h" +-#endif + + #include "reg_helper.h" + +@@ -1267,12 +1266,8 @@ static bool construct( + } + } + +-#if defined(CONFIG_DRM_AMD_DC_FBC) + dc->fbc_compressor = dce110_compressor_create(ctx); + +- +- +-#endif + if (!underlay_create(ctx, &pool->base)) + goto res_create_fail; + +-- +2.7.4 + |