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Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4482-drm-amdgpu-fix-insert-nop-for-UVD6-ring.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/4482-drm-amdgpu-fix-insert-nop-for-UVD6-ring.patch60
1 files changed, 60 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4482-drm-amdgpu-fix-insert-nop-for-UVD6-ring.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4482-drm-amdgpu-fix-insert-nop-for-UVD6-ring.patch
new file mode 100644
index 00000000..f9cdbae5
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4482-drm-amdgpu-fix-insert-nop-for-UVD6-ring.patch
@@ -0,0 +1,60 @@
+From 809c95b389309e8b558b7b42271cb1eb1cb52b50 Mon Sep 17 00:00:00 2001
+From: Leo Liu <leo.liu@amd.com>
+Date: Thu, 17 May 2018 13:44:28 -0400
+Subject: [PATCH 4482/5725] drm/amdgpu: fix insert nop for UVD6 ring
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+NO_OP register should be writen to 0
+
+Signed-off-by: Leo Liu <leo.liu@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 15 +++++++++++++--
+ 1 file changed, 13 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+index 8ce51946..37bb32b 100644
+--- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
+@@ -1116,6 +1116,18 @@ static void uvd_v6_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
+ amdgpu_ring_write(ring, 0xE);
+ }
+
++static void uvd_v6_0_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
++{
++ int i;
++
++ WARN_ON(ring->wptr % 2 || count % 2);
++
++ for (i = 0; i < count / 2; i++) {
++ amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0));
++ amdgpu_ring_write(ring, 0);
++ }
++}
++
+ static void uvd_v6_0_enc_ring_emit_pipeline_sync(struct amdgpu_ring *ring)
+ {
+ uint32_t seq = ring->fence_drv.sync_seq;
+@@ -1548,7 +1560,6 @@ static const struct amd_ip_funcs uvd_v6_0_ip_funcs = {
+ static const struct amdgpu_ring_funcs uvd_v6_0_ring_phys_funcs = {
+ .type = AMDGPU_RING_TYPE_UVD,
+ .align_mask = 0xf,
+- .nop = PACKET0(mmUVD_NO_OP, 0),
+ .support_64bit_ptrs = false,
+ .get_rptr = uvd_v6_0_ring_get_rptr,
+ .get_wptr = uvd_v6_0_ring_get_wptr,
+@@ -1567,7 +1578,7 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_phys_funcs = {
+ .emit_hdp_invalidate = uvd_v6_0_ring_emit_hdp_invalidate,
+ .test_ring = uvd_v6_0_ring_test_ring,
+ .test_ib = amdgpu_uvd_ring_test_ib,
+- .insert_nop = amdgpu_ring_insert_nop,
++ .insert_nop = uvd_v6_0_ring_insert_nop,
+ .pad_ib = amdgpu_ring_generic_pad_ib,
+ .begin_use = amdgpu_uvd_ring_begin_use,
+ .end_use = amdgpu_uvd_ring_end_use,
+--
+2.7.4
+