aboutsummaryrefslogtreecommitdiffstats
path: root/common/recipes-kernel/linux/linux-yocto-4.14.71/4437-drm-amdgpu-vg20-Enable-UVD-VCE-for-Vega20.patch
diff options
context:
space:
mode:
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4437-drm-amdgpu-vg20-Enable-UVD-VCE-for-Vega20.patch')
-rw-r--r--common/recipes-kernel/linux/linux-yocto-4.14.71/4437-drm-amdgpu-vg20-Enable-UVD-VCE-for-Vega20.patch36
1 files changed, 36 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4437-drm-amdgpu-vg20-Enable-UVD-VCE-for-Vega20.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4437-drm-amdgpu-vg20-Enable-UVD-VCE-for-Vega20.patch
new file mode 100644
index 00000000..04938d5d
--- /dev/null
+++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4437-drm-amdgpu-vg20-Enable-UVD-VCE-for-Vega20.patch
@@ -0,0 +1,36 @@
+From d602c3578bc76ff5b7280c5216db866436ce72e5 Mon Sep 17 00:00:00 2001
+From: James Zhu <James.Zhu@amd.com>
+Date: Mon, 30 Apr 2018 08:43:12 -0400
+Subject: [PATCH 4437/5725] drm/amdgpu/vg20:Enable UVD/VCE for Vega20
+
+Vega20 ucode load type is set to AMDGPU_FW_LOAD_DIRECT for default.
+So UVD/VCE needn't PSP IP block up. UVD/VCE for Vega20 can be enabled
+at this moment.
+
+Signed-off-by: James Zhu <James.Zhu@amd.com>
+Reviewed-by: Leo Liu <leo.liu@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/soc15.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
+index 8d0d054..7935484 100644
+--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
+@@ -529,10 +529,8 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
+ #endif
+ amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
+ amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block);
+- if (adev->asic_type != CHIP_VEGA20) {
+- amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block);
+- amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block);
+- }
++ amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block);
++ amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block);
+ break;
+ case CHIP_RAVEN:
+ amdgpu_device_ip_block_add(adev, &vega10_common_ip_block);
+--
+2.7.4
+