diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4333-drm-amd-powerplay-update-process-pptables.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4333-drm-amd-powerplay-update-process-pptables.patch | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4333-drm-amd-powerplay-update-process-pptables.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4333-drm-amd-powerplay-update-process-pptables.patch new file mode 100644 index 00000000..3d7f7647 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4333-drm-amd-powerplay-update-process-pptables.patch @@ -0,0 +1,91 @@ +From 8b6a86ba907c75c31229df0f3ec4ce25b381376e Mon Sep 17 00:00:00 2001 +From: Eric Huang <JinHuiEric.Huang@amd.com> +Date: Fri, 17 Nov 2017 11:31:09 -0500 +Subject: [PATCH 4333/5725] drm/amd/powerplay: update process pptables + +Add functionality to fetch gpio table from vbios. + +Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../amd/powerplay/hwmgr/process_pptables_v1_0.c | 37 ++++++++++++++++++++++ + 1 file changed, 37 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c b/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c +index 8516516..f0d48b1 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c +@@ -728,6 +728,32 @@ static int get_mm_clock_voltage_table( + return 0; + } + ++static int get_gpio_table(struct pp_hwmgr *hwmgr, ++ struct phm_ppt_v1_gpio_table **pp_tonga_gpio_table, ++ const ATOM_Tonga_GPIO_Table *atom_gpio_table) ++{ ++ uint32_t table_size; ++ struct phm_ppt_v1_gpio_table *pp_gpio_table; ++ struct phm_ppt_v1_information *pp_table_information = ++ (struct phm_ppt_v1_information *)(hwmgr->pptable); ++ ++ table_size = sizeof(struct phm_ppt_v1_gpio_table); ++ pp_gpio_table = kzalloc(table_size, GFP_KERNEL); ++ if (!pp_gpio_table) ++ return -ENOMEM; ++ ++ if (pp_table_information->vdd_dep_on_sclk->count < ++ atom_gpio_table->ucVRHotTriggeredSclkDpmIndex) ++ PP_ASSERT_WITH_CODE(false, ++ "SCLK DPM index for VRHot cannot exceed the total sclk level count!",); ++ else ++ pp_gpio_table->vrhot_triggered_sclk_dpm_index = ++ atom_gpio_table->ucVRHotTriggeredSclkDpmIndex; ++ ++ *pp_tonga_gpio_table = pp_gpio_table; ++ ++ return 0; ++} + /** + * Private Function used during initialization. + * Initialize clock voltage dependency +@@ -761,11 +787,15 @@ static int init_clock_voltage_dependency( + const PPTable_Generic_SubTable_Header *pcie_table = + (const PPTable_Generic_SubTable_Header *)(((unsigned long) powerplay_table) + + le16_to_cpu(powerplay_table->usPCIETableOffset)); ++ const ATOM_Tonga_GPIO_Table *gpio_table = ++ (const ATOM_Tonga_GPIO_Table *)(((unsigned long) powerplay_table) + ++ le16_to_cpu(powerplay_table->usGPIOTableOffset)); + + pp_table_information->vdd_dep_on_sclk = NULL; + pp_table_information->vdd_dep_on_mclk = NULL; + pp_table_information->mm_dep_table = NULL; + pp_table_information->pcie_table = NULL; ++ pp_table_information->gpio_table = NULL; + + if (powerplay_table->usMMDependencyTableOffset != 0) + result = get_mm_clock_voltage_table(hwmgr, +@@ -810,6 +840,10 @@ static int init_clock_voltage_dependency( + result = get_valid_clk(hwmgr, &pp_table_information->valid_sclk_values, + pp_table_information->vdd_dep_on_sclk); + ++ if (!result && gpio_table) ++ result = get_gpio_table(hwmgr, &pp_table_information->gpio_table, ++ gpio_table); ++ + return result; + } + +@@ -1116,6 +1150,9 @@ static int pp_tables_v1_0_uninitialize(struct pp_hwmgr *hwmgr) + kfree(pp_table_information->pcie_table); + pp_table_information->pcie_table = NULL; + ++ kfree(pp_table_information->gpio_table); ++ pp_table_information->gpio_table = NULL; ++ + kfree(hwmgr->pptable); + hwmgr->pptable = NULL; + +-- +2.7.4 + |