diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4231-drm-amdgpu-handle-domain-mask-checking-v2.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4231-drm-amdgpu-handle-domain-mask-checking-v2.patch | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4231-drm-amdgpu-handle-domain-mask-checking-v2.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4231-drm-amdgpu-handle-domain-mask-checking-v2.patch new file mode 100644 index 00000000..73bdabd5 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4231-drm-amdgpu-handle-domain-mask-checking-v2.patch @@ -0,0 +1,107 @@ +From 5848a2162722409228abc7b3064f08baeab7d472 Mon Sep 17 00:00:00 2001 +From: Chunming Zhou <david1.zhou@amd.com> +Date: Tue, 17 Apr 2018 18:34:40 +0800 +Subject: [PATCH 4231/5725] drm/amdgpu: handle domain mask checking v2 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +if domain is illegal, we should return error. +v2: + remove duplicated domain checking. + +Change-Id: I65a738f5ac4fc34be76de867afb0db1d4bd27c24 +Signed-off-by: Chunming Zhou <david1.zhou@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Kalyan Alle <kalyan.alle@amd.com> + +Conflicts: + drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c + drivers/gpu/drm/amd/amdgpu/amdgpu_object.c + include/uapi/drm/amdgpu_drm.h +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 8 +------- + drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 11 +---------- + include/uapi/drm/amdgpu_drm.h | 10 ++++++++++ + 3 files changed, 12 insertions(+), 17 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +index df85dcc..88de5c1 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c +@@ -262,13 +262,7 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data, + return -EINVAL; + + /* reject invalid gem domains */ +- if (args->in.domains & ~(AMDGPU_GEM_DOMAIN_CPU | +- AMDGPU_GEM_DOMAIN_GTT | +- AMDGPU_GEM_DOMAIN_VRAM | +- AMDGPU_GEM_DOMAIN_DGMA | +- AMDGPU_GEM_DOMAIN_GDS | +- AMDGPU_GEM_DOMAIN_GWS | +- AMDGPU_GEM_DOMAIN_OA)) ++ if (args->in.domains & ~AMDGPU_GEM_DOMAIN_MASK) + return -EINVAL; + + /* create a gem object to contain this object in */ +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +index 08fcc74..af6f1c5 100755 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +@@ -382,7 +382,6 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev, + }; + struct amdgpu_bo *bo; + unsigned long page_align, size = bp->size; +- u32 preferred_domains; + size_t acc_size; + int r; + +@@ -403,16 +402,8 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev, + drm_gem_private_object_init(adev->ddev, &bo->gem_base, size); + INIT_LIST_HEAD(&bo->shadow_list); + INIT_LIST_HEAD(&bo->va); +- preferred_domains = bp->preferred_domain ? bp->preferred_domain : ++ bo->preferred_domains = bp->preferred_domain ? bp->preferred_domain : + bp->domain; +- bo->preferred_domains = preferred_domains & (AMDGPU_GEM_DOMAIN_VRAM | +- AMDGPU_GEM_DOMAIN_GTT | +- AMDGPU_GEM_DOMAIN_CPU | +- AMDGPU_GEM_DOMAIN_GDS | +- AMDGPU_GEM_DOMAIN_GWS | +- AMDGPU_GEM_DOMAIN_OA | +- AMDGPU_GEM_DOMAIN_DGMA | +- AMDGPU_GEM_DOMAIN_DGMA_IMPORT); + bo->allowed_domains = bo->preferred_domains; + + if (bp->type != ttm_bo_type_kernel && +diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h +index be4fbb3..d04ef13 100644 +--- a/include/uapi/drm/amdgpu_drm.h ++++ b/include/uapi/drm/amdgpu_drm.h +@@ -92,6 +92,12 @@ extern "C" { + #define AMDGPU_GEM_DOMAIN_OA 0x20 + #define AMDGPU_GEM_DOMAIN_DGMA 0x40 + #define AMDGPU_GEM_DOMAIN_DGMA_IMPORT 0x80 ++#define AMDGPU_GEM_DOMAIN_MASK (AMDGPU_GEM_DOMAIN_CPU | \ ++ AMDGPU_GEM_DOMAIN_GTT | \ ++ AMDGPU_GEM_DOMAIN_VRAM | \ ++ AMDGPU_GEM_DOMAIN_GDS | \ ++ AMDGPU_GEM_DOMAIN_GWS | \ ++ AMDGPU_GEM_DOMAIN_OA) + + /* Flag that CPU access will be required for the case of VRAM domain */ + #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED (1 << 0) +@@ -589,6 +595,10 @@ union drm_amdgpu_cs { + /* Preempt flag, IB should set Pre_enb bit if PREEMPT flag detected */ + #define AMDGPU_IB_FLAG_PREEMPT (1<<2) + ++/* The IB fence should do the L2 writeback but not invalidate any shader ++ * caches (L2/vL1/sL1/I$). */ ++#define AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE (1 << 3) ++ + struct drm_amdgpu_cs_chunk_ib { + __u32 _pad; + /** AMDGPU_IB_FLAG_* */ +-- +2.7.4 + |