diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.14.71/4185-drm-amdgpu-add-emit_reg_write_reg_wait-ring-callback.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.14.71/4185-drm-amdgpu-add-emit_reg_write_reg_wait-ring-callback.patch | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.14.71/4185-drm-amdgpu-add-emit_reg_write_reg_wait-ring-callback.patch b/common/recipes-kernel/linux/linux-yocto-4.14.71/4185-drm-amdgpu-add-emit_reg_write_reg_wait-ring-callback.patch new file mode 100644 index 00000000..f65bbc15 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.14.71/4185-drm-amdgpu-add-emit_reg_write_reg_wait-ring-callback.patch @@ -0,0 +1,96 @@ +From fee37d98f398e7adbf8ab7af3e2a3cbf2d63efc1 Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Tue, 27 Mar 2018 11:58:14 -0500 +Subject: [PATCH 4185/5725] drm/amdgpu: add emit_reg_write_reg_wait ring + callback +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This callback writes a value to a register and then reads +back another register and waits for a value in a single +operation. + +Provide a helper function using two operations for engines +that don't support this opertion. + +Reviewed-by: Huang Rui <ray.huang@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + + drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 20 ++++++++++++++++++++ + drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 7 +++++++ + 3 files changed, 28 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index 44ab364..526c7a0 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -1891,6 +1891,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring) + #define amdgpu_ring_emit_rreg(r, d) (r)->funcs->emit_rreg((r), (d)) + #define amdgpu_ring_emit_wreg(r, d, v) (r)->funcs->emit_wreg((r), (d), (v)) + #define amdgpu_ring_emit_reg_wait(r, d, v, m) (r)->funcs->emit_reg_wait((r), (d), (v), (m)) ++#define amdgpu_ring_emit_reg_write_reg_wait(r, d0, d1, v, m) (r)->funcs->emit_reg_write_reg_wait((r), (d0), (d1), (v), (m)) + #define amdgpu_ring_emit_tmz(r, b) (r)->funcs->emit_tmz((r), (b)) + #define amdgpu_ring_pad_ib(r, ib) ((r)->funcs->pad_ib((r), (ib))) + #define amdgpu_ring_init_cond_exec(r) (r)->funcs->init_cond_exec((r)) +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c +index d5f526f..49cad08 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c +@@ -459,6 +459,26 @@ void amdgpu_ring_lru_touch(struct amdgpu_device *adev, struct amdgpu_ring *ring) + spin_unlock(&adev->ring_lru_list_lock); + } + ++/** ++ * amdgpu_ring_emit_reg_write_reg_wait_helper - ring helper ++ * ++ * @adev: amdgpu_device pointer ++ * @reg0: register to write ++ * @reg1: register to wait on ++ * @ref: reference value to write/wait on ++ * @mask: mask to wait on ++ * ++ * Helper for rings that don't support write and wait in a ++ * single oneshot packet. ++ */ ++void amdgpu_ring_emit_reg_write_reg_wait_helper(struct amdgpu_ring *ring, ++ uint32_t reg0, uint32_t reg1, ++ uint32_t ref, uint32_t mask) ++{ ++ amdgpu_ring_emit_wreg(ring, reg0, ref); ++ amdgpu_ring_emit_reg_wait(ring, reg1, mask, mask); ++} ++ + /* + * Debugfs info + */ +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +index 4dc3208..6ed21bd 100755 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +@@ -154,6 +154,9 @@ struct amdgpu_ring_funcs { + void (*emit_wreg)(struct amdgpu_ring *ring, uint32_t reg, uint32_t val); + void (*emit_reg_wait)(struct amdgpu_ring *ring, uint32_t reg, + uint32_t val, uint32_t mask); ++ void (*emit_reg_write_reg_wait)(struct amdgpu_ring *ring, ++ uint32_t reg0, uint32_t reg1, ++ uint32_t ref, uint32_t mask); + void (*emit_tmz)(struct amdgpu_ring *ring, bool start); + /* priority functions */ + void (*set_priority) (struct amdgpu_ring *ring, +@@ -228,6 +231,10 @@ int amdgpu_ring_lru_get(struct amdgpu_device *adev, int type, + int *blacklist, int num_blacklist, + bool lru_pipe_order, struct amdgpu_ring **ring); + void amdgpu_ring_lru_touch(struct amdgpu_device *adev, struct amdgpu_ring *ring); ++void amdgpu_ring_emit_reg_write_reg_wait_helper(struct amdgpu_ring *ring, ++ uint32_t reg0, uint32_t val0, ++ uint32_t reg1, uint32_t val1); ++ + static inline void amdgpu_ring_clear_ring(struct amdgpu_ring *ring) + { + int i = 0; +-- +2.7.4 + |